VLSI Design and SimulationVLSI Design and SimulationLecture 2Lecture 2MOS Transistor TheoryMOS Transistor TheoryECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutLabLab••Make sure that you have an engineeringMake sure that you have an engineeringUNIX accountUNIX account••Contact ECS if you donContact ECS if you don’’ttECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutMOS Transistor TheoryMOS Transistor Theory••Two types of transistorsTwo types of transistors––nMOSnMOS––pMOSpMOS••Digital integrated circuits use theseDigital integrated circuits use thesetransistors essentially as a voltagetransistors essentially as a voltagecontrolled switchcontrolled switchECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorgatedrainsource•If the gate is “high”, the switch is on•If the gate is “low”, the switch is offg=1dsg=0dsECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorBody/Substrate (p)ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorBody/Substrate (p)n+n+ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorPolycrystaline SiliconOxideBody/Substrate (p)n+n+ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorPolycrystaline SiliconGateSource DrainOxideBody/Substrate (p)n+n+ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorPolycrystaline SiliconGateSourceDrainOxide- - -+-- - -- - - -- - -+ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ ++ ++ ++ + + ++ + ++ ++++++++Accumulation ModeChannelECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorPolycrystaline SiliconGateSourceDrainOxide- - -+-- - -- - - -- - -+ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ ++ ++ ++ + + ++ + ++ ++++++++Accumulation ModeChannelECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorGateSourceDrainOxide- - -+-- - -- - - -- - -+ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ ++++Depletion ModeDepletion Region+ -VGS < VTECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorGateSourceDrainOxide- - -+-- - -- - - -- - -+ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ + + ++ + ++ + + ++ + +++ + + ++ + ++ + + ++ + ++++ + ++ + ++ ++++Inversion ModeDepletion Region+ -VGS > VT- - - - - - - -Inversion RegionECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorGateSourceDrainOxideInversion ModeDepletion Region+ -VGS > VTn+n+ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorVTVGSIDSVTVGSIDSEnhancement-mode Depletion-modeECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutThreshold VoltageThreshold Voltage••Dependent onDependent on––Gate conductor materialGate conductor material––Gate insulator materialGate insulator material––Channel DopingChannel Doping––Voltage difference between source and bodyVoltage difference between source and bodyECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutThreshold VoltageThreshold Voltage€ VT= VT 0+γ−2φF+ VSB− 2φF( )•Threshold voltage is usually arrived atempirically•γ is the body-effect coefficient and controls theimpact of the source to bulk voltage•φF is the Fermi potential and is dependent ondoping levels€ φF=kTqlnNANi     ECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutpMOS pMOS TransistorTransistorPolycrystaline SiliconGateSourceDrainOxide+ + +-++ + ++ + + ++ + +- - - -- - -- - - -- - --- - - -- - -- - - -- - ---- - -- - -- - - -- - -- - - -- - --- - - -- - -- - - -- - ---- - -- - -- - - -- - -- - - -- - --- - - -- - -- - - -- - ---- - -- - -- - - -- - -- - - -- - --- - - -- - -- - - -- - ---- - -- - -- -- -- -- - - -- - -- --------Accumulation ModeChannelECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutpMOS pMOS TransistorTransistorVTVGSIDSEnhancement-mode Depletion-modeVTVGSIDSECE 249 VLSI Design and SimulationSpring 2005Lecture 2© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutnMOS nMOS TransistorTransistorGateSourceDrainOxideDepletion Region+ -VGS > VTn+n++ -VDS small (VGS-VDS>VT)Linear or Nonsaturated ModeECE 249 VLSI Design