IRSIM(1) IRSIM Users’s Manual IRSIM(1)NAMEirsim − An event-driven logic-level simulator for MOS circuitsSYNOPSISirsim [-s] prm_file sim_file ... [+hist_file] [-cmd_file ...]DESCRIPTIONIRSIM is an event-driven logic-level simulator for MOS (both N and P) transistor circuits. Tw o simulationmodels are available:switch Each transistor is modeled as a voltage-controlled switch. Useful for initializing or determiningthe functionality of the network.linear Each transistor is modeled as a resistor in series with a voltage-controlled switch; each node has acapacitance. Node values and transition times are computed from the resulting RC network, usingChorng-Yeoung Chu’s model. Chris Terman’s original model is not supported any more.If the -s switch is specified, 2 or more transistors of the same type connected in series, with no other con-nections to their common source/drain will be stacked into a compound transistor with multiple gates.The prm_file is the electrical parameters file that configure the devices to be simulated. It defines thecapacitance of the various layers, transistor resistances, threshold voltages, etc... (see presim(1)).If prm_file does not specify an absolute path then IRSIM will search for the prm_file as follows (in thatorder):1) ./<prm_file> (in the current directory).2) ˜cad/lib/<prm_file>3) ˜/cad/lib/<prm_file>.prmIf ˜cad/ does not exist, IRSIM will try to use directory /projects/cad. The default search directory (˜cad)can be overriden by setting the environment variable CAD_HOME to the appropriate directory prior to run-ning IRSIM (i.e. setenv CAD_HOME /usr/beta/mycad).IRSIM first processes the files named on the command line, then (assuming the exit command has not beenprocessed) accepts commands from the user, executing each command before reading the next.File names NOT beginning with a ’-’ are assumed to be sim files (see sim(5)), note that this version doesnot require to run the sim files through presim. These files are read and added to the network database.There is only a single name space for nodes, so references to node "A" in different network files all refer tothe same node. While this feature allows one to modularize a large circuit into several network files, caremust be taken to ensure that no unwanted node merges happen due to an unfortunate clash in names.File names prefaced with a ’-’ are assumed to be command files: text files which contain command lines tobe processed in the normal fashion. These files are processed line by line; when an end-of-file is encoun-tered, processing continues with the next file. After all the command files have been processed, and if an"exit" command has not terminated the simulation run, IRSIM will accept further commands from the user,prompting for each one like so:irsim>The hist_file is the name of a file created with the dumph command (see below). If it is present, IRSIMwill initilize the network to the state saved in that file. This file is different from the ones created with the">" command since it saves the state of every node for all times, including any pending events.This version supports changes to the network through the update command. Also, the capability to incre-mentally re-simulate the network up to the current time is provided by the isim command.1IRSIM(1) IRSIM Users’s Manual IRSIM(1)COMMAND SUMMARY@ filename take commands from command file? wnode... print info about node’s source/drain connections! wnode... print info about node’s gate connections< filename restore network state from file> filename write current network state to file<< filename same as "<" but restores inputs too| comment... comment lineactivity from [to] graph circuit activity in time intervalana wnode... display nodes in analyzer windowanalyzer wnode... display nodes in analyzer windowassert wnode [m] val assert that wnode equals valueassertWhen nodeT valT node valassert when a condition is metback [time] move back to timec [n] simulate for n clock cycles (default:1)changes from [to] print nodes that changed in time intervalclock [node [val]] define value sequence for clock nodeclear clear analyzer window (remove signals)d [wnode]... print display list or specified node(s)debug [debug_level...] set debug level (default: off)decay [n] set charge decay time (0 => no decay)display [arg]... control what gets displayed whendumph filename... write net history to filehist [on|off] turn history on or offexit [status] return to systemflush [time] flush out history up to time (default: now)h wnode... make node logic high (1) inputhas_coords print YES if transistor coordinates are availableinputs print current list of input nodesires [n] set incremental resolution to n nsisim [filename] incrementally resimulate changes form filenamel wnode... make node logic low (0) inputlogfile [filename] start/stop log filemodel [name] set simulation model to namep step clock one simulation step (phase)path wnode... display critical path for last transition of a nodepowlogfile [filename] start/stop power logfilepowtrace -[node]... start/stop power tracing of specified node(s)/vector(s)powstep toggle the display of power estimate for each timestepprint comment... print specified textprintp print a list of all pending eventsprintx print all undefined (X) nodesq terminate input from current streamR [n] simulate for n cycles (default:longest sequence)readh filename read history from filenamereport[level] set/reset reporting of decay eventss [n] simulate for n ns. (default: stepsize)stepsize [n] set simulation step size to n ns.set vector value assign value to vectorsetlog[file|off] log net changes to file (off -> no log)setpath set search path for cmd filesstats print event statistics2IRSIM(1) IRSIM Users’s Manual IRSIM(1)sumcap print out the sum of the capacitance of all nodest [-]wnode... start/stop tracing of specified nodestcap print list of shorted transistorstime [command] print resource utilization summaryuntil wnode [mask] value countdelayed assert based on the clock count.u wnode... make node undefined (X) inputunitdelay [n] force transitions to take n ns. (0 disables)update filename read net changes from fileV [node [value...]] define sequence of inputs for a nodevector label node... define bit vectorvsupply voltage set supply voltage for calculating power (default 5V)w [-]wnode... add/delete nodes from display listwnet [filename] write network to filex wnode... remove node from input listsXdisplay [host:n]