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UT EE 382C - Modeling and Simulation

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Modeling and Simulation ofData Transmission in an ADSL TransceiverEmbedded Software SystemsLiterature Survey BriefingBy Elmustafa ErwaMarch 24, 2004Overview1 Introduction to ADSL Technology1 ADSL Transceiver Architecture1 Block Diagram Overview1 Models of Computation 1 Proposed WorkIntroduction to ADSL1 Asymmetric Digital Subscribers Lines 1 High-rate digital data over existing ordinary telephone lines1 Simultaneous high-speed data transmission and normal telephone services1 Data Transmission up to:1 10 Mbps downstream (ISP to customer)1 6 Mbps upstream (customer to ISP)ADSL Transceiver ArchitectureA block diagram of an ADSL transceiver1 Quadrature Amplitude Modulation (QAM)1 Channel Modeled as a FIR filterparallel to serialQAMdecoderFreq. domain EQserial to parallelQAMencoderInput bitstreammirrordataandN-IFFTadd cyclic prefixparallel to serialDAC andtransmit filterN-FFTand removemirroreddataserialtoparallelremove cyclic prefixADC, time domain EQ, and receive filterchannelDetected bitstreamTRANSMITTERRECEIVERN/2 channelsN channelsN/2 channels N channelsBlock Diagram Overview1 Quadrature Amplitude Modulation 1 DMT: generate orthogonal channels for optimal bit allocation1 Inverse Fast Fourier Transform1 Fast Fourier Transform1 Cyclic Prefix Extension: Intersymbolinterference mitigation1 Equalization: channel effects suppressionModels of Computation1 DDF: initialization and adaptive bit allocation1 SDF: best for DSP applications1 Timed SDF: modeling continuous timeRECEIVERTRANSMITTERmirror data andN-IFFTQAM enc.serial to parallelFEQadd cyclic prefixparallel to serialDACChannelTEQADCN-FFT and remove mirrored dataQAM dec.serial to parallelremove cyclic prefixparallel to serialDDF SDFTIMED SDFProposed Work1 Model ADSL Transceiver and the channel using SDF1 Extend model to include DDF and Timed SDF if time permits 1 Use LabVIEW to simulate the system and evaluate the bit error rate (BER)Questions and


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UT EE 382C - Modeling and Simulation

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