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UMD ENMA 490 - Device Design Stage 2: Modified Microchannel Test Design

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Device Design Stage 2: Modified Microchannel Test DesignDevice Design Stage 2: Modified Microchannel Test DesignDevice Objective:Based on the design of Stage 1, and the inability to fabricate and test the design because of packaging integration problems, Stage 2 had three major objectives. The first objective was to adapt the reservoir positions from Stage 1 to locations matching the existing acrylic packaging solution. The second objective was to reduce the number of I/O and interconnects to produce unique flow paths to test different flow conditions and routes. Finally, the third objective was to scale up the dimensions of the device to ease fabrication and testing. The overall objective of Stage 2 is to address the shortcoming of Stage 1 to test the viability of a two level passive micro-fluidic device. Fabrication and test data from this stage will be necessary to move toward the eventual goal of a two level actively controlled micro-fluidic device.Device Logic:As in Stage 1, the device for Stage 2 was to be constructed by stacking PDMS layers on asilicon wafer. The PDMS layers were to be made from a SU-8 based mold. In Stage 2, this stacking sequence included two distinct micro-channel layers, one interconnect layer, and one top cover layer to provide a seal with the acrylic packaging. Also based on Stage 1, the logic of Stage 2 continues to use a simple grid pattern to move fluid within and between fluid layers. However, the locations of the reservoirs were changed to fit the existing acrylic packaging optionto facilitate testing. Moreover, as can be seen in Figure 1 below, the design includes five distinct fluid paths, using a total of 11 I/O.Figure 1: A diagram of the Stage 2 device (Put in the New Stage 2 Bryce Picture)Each of the five fluid paths were chosen to test increasingly more complicated situations, culminating in Fluid path 5, which was to mimic a more realistic fluid path that is more likely to be found in micro-fluidic routing. The five fluid paths test both the logic capabilities of the design as well as the capabilities of the process used to fabricate the device. Table 1, below, outlines the five fluid paths constructed.Table 1: A Table summarizing the five fluid paths in the Stage 2 deviceFluid Path 1: This path proceeds down from the input reservoir to the top microchannel layer, across the wafer, and back up the output reservoir. This fluid path serves to test the ability of the device to handle simple flow through the interconnect layer. Fluid Path 2: This path proceeds down from the input reservoir to the bottom microchannel layer where the fluid is directed in two sequential 90 degree turns and returns backto the I/O next to the input reservoir, where it then exits up the output reservoir. The purpose of this path was to test the ability of the device to handle direction of the fluid in more complicated fluid paths. Upper Microchannel Reservoir (I/O)InterconnectsFluid Path 3: This path proceeds down from the input reservoir to the top microchannel layer, where the path runs across the top layer, down to the bottom microchannel layer, across the bottom microchannel layer, and finally up the output reservoir. The purpose of this path was to test the ability of the device to handle more complicated fluid flow (as in Fluid Path 2) on two levels.Fluid Path 4: This path proceeds down from the input reservoir to the top microchannel layer, where the path runs across the top layer, turns 90 degrees, then proceeds down to the bottom microchannel layer, across the bottom microchannel layer, up to the top microchannel layer, across the top microchannel layer, and finally up the output reservoir. This path is logically similar to Fluid path 3, except an additional90-degree turn and layer change were added for additional complexity.Fluid Path 5: This path proceeds down from the input reservoir, across the top microchannel layer, down to the bottom microchannel layer, and diverges in two possible directions, each of which leads to a different output reservoir. The purpose of this path is to test a situation where the fluid has more then one possible fluid path. Moreover, this fluid path is ideal for the testing of a valve in future design stages to direct the flow in one of the two possible directions. Device Dimensions: Based on the dimensions of Stage 1, the dimensions of Stage 2 were scaled up to ease in fabrication and testing. Table 2 below summarizes the critical dimensions that were chosen for Stage 2.Table 2: A table summarizing the critical dimensions of the Stage 2 deviceCritical Dimension ValuePDMS Layer Height 100m Microchannel Width 500m Interconnect Width 1000m Interconnect Depth 1000m Reservoir Diameter 0.4 cmAs in Stage 1, the dimensions were only limited by the maximum PDMS layer thickness of ~100 m and the silicon wafer diameter of 4 inches. Based on these constraints, the dimensions were chosen to make fabrication and testing as easy as possible to observe withoutthe aid of instrumentation such as microscopes, etc. The interconnect dimensions were made twice as large as the microchannel width in case there were problems in aligning the sequential PDMS layers. This larger size interconnect was used to guarantee the two microchannel layers would be connected despite small misalignments during the layer assembly. The reservoir diameter chosen exactly matches that which was needed to fit within the existing acrylic packaging that is available to the group. Adapting the Stage 2 design to the existing package was seen as a way to facilitate a fast and efficient testing


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UMD ENMA 490 - Device Design Stage 2: Modified Microchannel Test Design

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