Application ReportSPRA809A – October 20021How to Begin Development Today With the TMS320C6713Floating-Point DSPDominic Suryabudi C6000 Applications TeamABSTRACTDevelopment can begin now for the Texas Instruments TMS320C6713 highest-performance,peripheral-rich floating-point digital signal processor (DSP) systems. Because of thecompatibility between TMS320C6000 DSP platform devices, existing C6000 softwaretools and development platforms can be used to develop code for the C6713 and other futuredevices. This capability allows for systems to be up and running when silicon becomesavailable.Contents1 Introduction to the TMS320C6713 DSP Device 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 TMS320C6000 Compatibility 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Similarities Between the C6713 and C6711(B) DSPs 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Differences Between the C6713 and C6711(B) DSPs 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Highest-Performance Floating-Point DSP 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 New Peripherals 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Multichannel Audio Serial Port (McASP) 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.1 Multichannel Time-Division Multiplexed (TDM) Synchronous Transfer Mode 9. . . . . . . 4.1.2 Burst Transfer Mode 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.3 Supported Bit Stream Formats for TDM and Burst Transfer Modes 10. . . . . . . . . . . . . . 4.1.4 Digital Audio Interface Transmitter (DIT) Transfer Mode (Transmitter Only) 10. . . . . . . 4.1.5 McASP Flexible Clock Generators 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.6 McASP Error Handling and Management 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 Inter-Integrated Control Circuit (I2C) 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Begin Writing Code for the C6713 Today 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 C6000 Tools Support 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 C6000 Literature Available 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of FiguresFigure 1 TMS320C6000 Highest-Performance Floating-Point DSP Roadmap 2. . . . . . . . . . . . . . . . . Figure 2 TMS320C6713 DSP Block Diagram 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 3 McASP Block Diagram 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 4 I2C Module Block Diagram 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks are the property of their respective owners.SPRA809A2 How to Begin Development Today With the TMS320C6713 Floating-Point DSP1 Introduction to the TMS320C6713 DSP DeviceThe Texas Instruments TMS320C6000 DSP platform of high-performance digital signalprocessors (DSPs) now includes the TMS320C6713. The C6713 brings the highest level ofperformance in the C6000 DSP platform of floating-point DSPs. At the initial clock rate of225 MHz, the C6713 can process information at a rate of 1.35 giga-floating-point operations persecond (GFLOPS).Introduced in February 1997, the C6000 DSP platform is based on TI’s VelociTI architecture,an advanced very-long-instruction-word (VLIW) architecture for DSPs. Advanced features of theVelociTI architecture include instruction packing, conditional branching, and pre-fetchedbranching, all of which overcome problems that were associated with previous VLIWimplementations. The architecture is highly deterministic, with few restrictions on how or wheninstructions are fetched, executed, …
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