EECC341 - ShaabanEECC341 - Shaaban#1 Lec # 19 Winter 2001 2-14-2002• Read Only Memory (ROM)– Structure of diode ROM– Types of ROMs.– ROM with 2-Dimensional Decoding.– Using ROMs for Combinational Logic• Read/Write Memory (Random Access Memory, RAM):– Types of RAM:• Static RAM (SRAM)• Dynamic RAM (DRAM)– SRAM Timing– DRAM TimingMemory DevicesMemory DevicesEECC341 - ShaabanEECC341 - Shaaban#2 Lec # 19 Winter 2001 2-14-2002Read-Only Memory (ROM)Read-Only Memory (ROM)• A combinational circuit with n inputs and b outputs:2n x bROMAddressinputsA(n-1, ... , 0)n b DataoutputsD(b-1, ... , 0)• Programmable   values determined by user• Nonvolatile   contents retained without power• Uniform (Random) Access   delay is uniform for all addressesEECC341 - ShaabanEECC341 - Shaaban#3 Lec # 19 Winter 2001 2-14-2002Read-Only Memory (ROM)Read-Only Memory (ROM)• Two views of ROM:– ROM stores 2n words of b bits each, or– ROM stores an n-input, b-output truth tableExample: A1 A0 D3 D2 D1 D0 0 0 0 1 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0Stores 4 4-bit words, orstores 4 functions of 2input variables b = 4 n = 2EECC341 - ShaabanEECC341 - Shaaban#4 Lec # 19 Winter 2001 2-14-2002Internal Structure of 4Internal Structure of 4×4×4×4×4 Diode ROM Diode ROMD0D1D2D32 to 4DecoderA1A0Bit Lines/w0/w1/w2/w3 Diode 1No Diode 001010001100011111 of n Word LinesR0R1R2R3+5 VEECC341 - ShaabanEECC341 - Shaaban#5 Lec # 19 Winter 2001 2-14-2002Types OfTypes Of ROMs ROMs• Mask ROM– Connections made by the semiconductor vendor– Expensive setup cost, Several weeks for delivery. High volume only– Bipolar or MOS technology• PROM– Programmable ROM– Vaporize (blow) fusible links with PROM programmer using high voltage/current pulses– Bipolar technology– One-time programmable• EPROM– Erasable Programmable ROM– Charge trapped on extra “floating gate” of MOS transistors– Exposure to UV light removes charge. Limited number of erasures (10-100)• EEPROM (E2ROM)– Electrically Erasable ROM– Not RAM (relatively slow charge/discharge)– limited number of charge/discharge cycles (10,000)• Flash Memory– Electronically erasable in blocks– 100,000 erase cycles– Simpler and denser than EEPROMEECC341 - ShaabanEECC341 - Shaaban#6 Lec # 19 Winter 2001 2-14-2002ROM Type SummaryROM Type SummaryTypeMask ROMMask ROMPROMEPROMEEPROMFLASHTechnologyNMOS,CMOSBipolarBipolarNMOS, CMOSNMOSCMOSRead Cycle20-200 ns<100 ns<100 ns25-200 ns50-200 ns25-200 nsWrite Cycle4 weeks4 weeks5 minutes5 minutes10 µµs/byte10 µµs/blockCommentsWrite once; low powerWrite once; high power; low densityWrite once; high power; no maskchargeReusable; low power; no mask charge10,000 writes/location limit100,000 erase cyclesEECC341 - ShaabanEECC341 - Shaaban#7 Lec # 19 Winter 2001 2-14-2002Internal Structure of Transistor ROMInternal Structure of Transistor ROMR0R1R2R3+5 V/D3 /D2 /D1 /D0 Transistor 1 No transistor 0 w3• Replace diodes with MOS transistors• Change decoder to active-high outputs1000EECC341 - ShaabanEECC341 - Shaaban#8 Lec # 19 Winter 2001 2-14-2002VDDFloating gateActive-highword linesActive-lowbit linesEPROM and EEPROM StructureEPROM and EEPROM StructureEECC341 - ShaabanEECC341 - Shaaban#9 Lec # 19 Winter 2001 2-14-2002Almost square chip3 to 8Decoder/w0/w1/w7+5 V 0 78 to 1 muxA5A3A2A0D0•••• • •8 x 8 Diode Array64 x 1 ROM with 2-Dimensional Decoding64 x 1 ROM with 2-Dimensional DecodingEECC341 - ShaabanEECC341 - Shaaban#10 Lec # 19 Winter 2001 2-14-2002RowdecoderPoweronStoragearrayColumnmultiplexerA0A1Am-1AmAm+1An-1/CS/OEDb-1 Db-2 D0PoweronPoweronInternal 2Internal 2nn x b ROM Structure x b ROM StructureEECC341 - ShaabanEECC341 - Shaaban#11 Lec # 19 Winter 2001 2-14-2002UsingUsing ROMs ROMs for for Combinational Combinational Logic LogicExample A 3-input, 4-output combinational logic function: Function: 2-to-4 Decoder with Polarity ControlA2 = Polarity (0 = active Low, 1= active High)A1, A0 = I1, I0 (2-bit input )D3...D0 = Y3...Y0 (4-bit decoded output) Inputs OutputsA2 A1 A0 D3 D2 D1 D0 0 0 0 1 1 1 0 0 0 1 1 1 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 1 1 0 0 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 1 1 0 0 0 8 × 4 ROMA0 D0A1 D1A2 D2 D3 Y0 I1POL Y1 Y2 Y3 I0EECC341 - ShaabanEECC341 - Shaaban#12 Lec # 19 Winter 2001 2-14-2002Read/Write Memory (RWM / RAM)Read/Write Memory (RWM / RAM)• RWM = RAM (Random Access Memory)• Highly structured like ROMs• Can store and retrieve data at (relatively) the same speed• Static RAM (SRAM) retains data in latches (while powered)• Dynamic RAM (DRAM) stores data as capacitor charge; allcapacitors must be recharged periodically (refresh).• Volatile Memory: Both Static and Dynamic RAM• Nonvolatile Memory: Data retained when power lost= ROMs, NVRAM (w/battery), Flash MemoryEECC341 - ShaabanEECC341 - Shaaban#13 Lec # 19 Winter 2001 2-14-2002Basic Structure of SRAMBasic Structure of SRAM• Address/Control/Data Out lines like a ROM (Reading)+ Write Enable (WE) and Data In (DIN)(Writing)2n x b RAMA0A1An-1DIN0DIN1WEOECSDINb-1DOUTb-1DOUT1DOUT0EECC341 - ShaabanEECC341 - Shaaban#14 Lec # 19 Winter 2001 2-14-2002One Bit of SRAMOne Bit of SRAM• SEL and WR asserted → → IN data stored in D-latch (Write)• SEL only asserted → → D-latch output enabled (Read)• SEL not asserted → → No operationD Q/WR/SELIN OUTINSELWROUTCEECC341 - ShaabanEECC341 - Shaaban#15 Lec # 19 Winter 2001