DOC PREVIEW
SJSU EE 270 - Syllabus

This preview shows page 1 out of 3 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 3 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 3 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

EE 270 Spring 2006 Page 1 San Jose State University Department of Electrical Engineering Course Title: Advanced Logic Design Meeting: MW 17:30 - 18:45, E 341 Section 1 & 2 Lab Open Lab, E 389 Instructor: Dr. Tri Caohuu, ENG 375 Email: [email protected] Tel: (408) 924 3951 Course Outline: This course presents principles and techniques in logic design: design and analysis of combinational logic circuit; flip-flop properties, sequential circuit analysis and synthesis, algorithmic state machines; asynchronous circuit design and analysis; and design for testability. The students are required to do exercises and a design project in the open laboratory using HDL-based methodology. The course is intended for senior students and beginning graduate student in the digital design concentration. Text: Digital Principles and Design, Donald Givone McGrawHill 2003 Ref. Text: 1. Digital Logic Circuit Analysis and Design, V. P. Nelson, H. T. Nagle, B. D. Carroll, J. D. Irwin, H Prentice Hall 1995 2. Contemporary Logic Design, Randy h. Katz and Gaetano Borriello, Prentice hall 2005 3. Asynchronous Circuit Design, Chris J. Myers, Prentice Hall 2001 Grading policy: Midterm 30% Projects 30% Final Exam 40% Office Hours: MW: 15:00 - 16:00 F : 10:30 – 12:30 Open Laboratory: E 289, E291/Unix-based and E 389/PC-based FINAL EXAM: Monday, May 22, 17:15-19:30EE 270 Spring 2006 Page 2 COURSE OUTLINE I. Introduction [Week 1 and 2]  Review of switching algebra  Analysis and synthesis of combinational logic  Synchronous vs asynchronous circuits  HDL tools II. Simplification of switching functions [Week 3 and 4]  Karnaugh Maps  Quine-McCluskey method  Expresso Algorithm III. Synchronous circuit design [Week 5, 6, 7, 8]  Sequential devices  Analysis and synthesis of synchronous sequential circuits  Simplification and Optimization of Sequential Circuit IV. Asynchronous sequential circuits [Week 10, 11, 12,13]  Huffman Circuit  Muller Circuit  Timed Circuit  Petri-net and Graph-based Methods  Transformation Methods  Asynchronous data path (pipelines)  Verification V. Introduction to design for testability [Week 14,15]  Fault models  Combinational circuit testing  Sequential logic circuit  DFT  BIST VI. Design Project Note: Week 9 is for review and midtermEE 270 Spring 2006 Page 3 EE@SJSU Honesty and Respect for Others and Public Property EE HONOR CODE The Electrical Engineering Department will enforce the following Honor Code that must be read and accepted by all students. “I have read the Honor Code and agree with its provisions. My continued enrollment in this course constitutes full acceptance of this code. I will NOT: • Take an exam in place of someone else, or have someone take an exam in my place • Give information or receive information from another person during an exam • Use more reference material during an exam than is allowed by the instructor • Obtain a copy of an exam prior to the time it is given • Alter an exam after it has been graded and then return it to the instructor for re-grading • Leave the exam room without returning the exam to the instructor.” Measures Dealing with Occurrences of Cheating Department policy mandates that the student or students involved in cheating will receive an “F” on that evaluation instrument (paper, exam, project, homework, etc.) and will be reported to the Department and the University. A student’s second offense in any course will result in a Department recommendation of suspension from the University. EE 270 HONOR CODE In addition to EE Honor Code, EE 270 students understand that professional attitude is necessary to maintain a comfortable academic environment. For examples:  I DO NOT just skip the lecture and then ask the instructor to summarize the lecture for me later on. Office hours are for students to have questions, not for the instructor to summarize the lecture for any specific student.  I come to the class on time and leave the class at the end of the lecture.  To minimize possible tension during the exams, I WILL follow the exam rules closely.  I work on the lab assignments and final project by myself.  I understand that long-term learning is my responsibility and so I always keep it up I strongly believe that NOT any statement similarly to examples below can be used:  I am working full-time and so do not have enough time for the class.  I have quite many classes this semester and so I do not have enough time for the class.  I just need a passing grade to graduate this semester.  I live far away from the campus and so I can not come to the class often.  etc.,


View Full Document

SJSU EE 270 - Syllabus

Documents in this Course
Load more
Download Syllabus
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Syllabus and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Syllabus 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?