This preview shows page 1-2-3-4-5-6-7-51-52-53-54-55-56-57-58-102-103-104-105-106-107-108 out of 108 pages.
Appendix7.pdfAppendix7 additional pages.pdfDouble bufferRenderRotateAddDraw line and circleTranslateDisplayVGADelay‘timescale 1ns / 1ps//////////////////////////////////////////////////////////////////////////////////// Company:// Engineer: Walker Chan//// Create Date: 18:49:49 05/02/2007// Design Name:// Module Name: laser_driver// Project Name:// Target Devices:// Tool versions:// Description://// Dependencies://// Revision:// Revision 0.01 - File Created// Additional Comments:////////////////////////////////////////////////////////////////////////////////////// top level module for laser driver. Takes segment data from vector drawing module// and outputs to laser. Also handles laser parameters (translation, rotation, etc.)// input from the keyboard.module laser_driver(clock, reset, pattern_source,x1_in, y1_in, x2_in, y2_in, next_seg,dac_data, dac_addr, dac_wr, laser_en,key_dat, key_clk,vga_start, vga_busy, vga_x, vga_y, vga_pixel, vga_wr);input clock, reset;// patterninput pattern_source;input [7:0] x1_in, y1_in, x2_in, y2_in;output next_seg;// dacoutput [7:0] dac_data;output [1:0] dac_addr;output dac_wr;output laser_en;1// keyboardinput key_dat;input key_clk;// vgainput vga_start;output vga_busy;output [9:0] vga_x;output [8:0] vga_y;output vga_pixel;output vga_wr;// interconnectswire [7:0] x, y;wire [7:0] newx, newy;wire [7:0] a, b, c, d, xoffset, yoffset, xbias, ybias, speed;wire strobe;wire [3:0] param;wire [1:0] op;// keyboard input for laser parameterswire [7:0]ascii;wire ascii_ready;assign strobe = ascii_ready;ps2_ascii_input keyboard(clock, reset, key_clk, key_dat, ascii, ascii_ready);keyboard_decoder keydec1(clock, reset, ascii, param, op);// input from Huy or romlaser_input laser_input1(clock, reset, pattern_source,x1_in, y1_in, x2_in, y2_in, next_seg,x, y, speed, laser_en);// transformationtransformation trans1(clock, reset, a, b, c, d, xoffset, yoffset, x, y, newx, newy);// dacdac dac1(clock, reset, newx, newy, xbias, ybias, dac_data, dac_addr, dac_wr);// laser parameterslaser_parameters laser_params(clock, reset, param, op, strobe,2a, b, c, d, xoffset, yoffset, xbias, ybias, speed,vga_start, vga_busy, vga_x, vga_y, vga_pixel, vga_wr);endmodulemodule transformation(clock, reset, a, b, c, d, xoff, yoff, oldx, oldy, newx, newy);input clock, reset;input [7:0]oldx, oldy;input signed [7:0] a, b, c, d, xoff, yoff;output [7:0]newx, newy;wire signed [7:0] trans_inx, trans_iny;wire signed [15:0] trans_outx, trans_outy;// shift to [-128, 127] rangeassign trans_inx = oldx - 128;assign trans_iny = oldy - 128;// do transformation R’ = AR + Bassign trans_outx = trans_inx * a + trans_iny * b;assign trans_outy = trans_inx * c + trans_iny * d;// truncate back to 8 bits, move back to [0,255] rangeassign newx = trans_outx[15:8] + 128 + xoff;assign newy = trans_outy[15:8] + 128 + yoff;endmodule//////////////////////////////////////////////////////////////////////////////////// Company:// Engineer: Walker Chan//// Create Date: 17:43:32 05/02/2007// Design Name:// Module Name: pattern// Project Name:// Target Devices:// Tool versions:// Description://// Dependencies://// Revision:3// Revision 0.01 - File Created// Additional Comments:////////////////////////////////////////////////////////////////////////////////////module laser_input(clock, reset, pattern_source, x1_in, y1_in, x2_in, y2_in, next_seg, x, y, speed, laser_en);input clock, reset;input pattern_source;input [7:0] x1_in, y1_in, x2_in, y2_in;output next_seg;output [7:0] x, y; // --> transformation --> DACsinput [7:0] speed;output laser_en;// timerwire end_sel;laser_timer timer1(clock, reset, next_seg, end_sel, laser_en, speed);// pattern rom for testingwire [7:0] test_x1, test_y1, test_x2, test_y2;pattern pattern1(clock, reset, next_seg, test_x1, test_y1, test_x2, test_y2);// pattern source selectionwire [7:0] x1, y1, x2, y2;assign x1 = pattern_source ? test_x1 : x1_in;assign y1 = pattern_source ? test_y1 : y1_in;assign x2 = pattern_source ? test_x2 : x2_in;assign y2 = pattern_source ? test_y2 : y2_in;// end point selectionassign x = end_sel ? x2 : x1;assign y = end_sel ? y2 : y1;endmodule// reads sequential data out of a rom to generate a test patternmodule pattern(clock, reset, next, x1, y1, x2, y2);input clock, reset;input next;output [7:0] x1, y1, x2, y2;// number of lines in testpattern rom to read4parameter ROM_SIZE = 120;wire [31:0] segment;reg [7:0] addr;// increment address counteralways @(posedge clock)beginif (reset)addr <= 0;else if (addr > ROM_SIZE)addr <= 0;elseif (next)addr <= addr + 1;end// look up addr in the pattern romtestpattern rom1 (addr, clock, segment);// break up segment into the endpointsassign x1 = segment[31:24];assign y1 = segment[23:16];assign x2 = segment[15:8];assign y2 = segment[7:0];endmodulemodule laser_timer(clock, reset, next, mux, laser_en, speed);input clock, reset;output next, mux, laser_en;input [7:0] speed;reg [25:0] count;reg next, mux, laser_en;wire [25:0]max;assign max = {speed, 10’b11111111111};always @(posedge clock)beginnext <= 0;mux <= 0;laser_en <= 0;5if(reset) count <= 0;else count <= count + 1;if(count == max)begincount <= 0;next <= 1;end// generate signal to flip between endpointsif (count > max/2) mux <= 1;// generate signal to blank laser// needs workif (count > 100000 && count < max-10000) laser_en <= 1;endendmodule//////////////////////////////////////////////////////////////////////////////////// Company:// Engineer: Walker Chan//// Create Date: 17:37:03 04/25/2007// Design Name:// Module Name: dac// Project Name:// Target Devices:// Tool versions:// Description://// Dependencies://// Revision:// Revision 0.01 - File Created// Additional Comments:////////////////////////////////////////////////////////////////////////////////////// dac drivermodule dac(clock, reset, ch1, ch2, ch3, ch4, data, addr, wr);input clock;6input reset;input [7:0] ch1;input [7:0] ch2;input [7:0] ch3;input [7:0] ch4;output [7:0] data;output [1:0] addr;output wr;reg [7:0] data;reg [1:0] addr;reg wr;reg [3:0] state;parameter INIT = 0;parameter CH1 = 1;parameter EN1a = 2;parameter EN1b = 3;parameter HOLD1 = 4;parameter CH2 = 5;parameter EN2a = 6;parameter EN2b = 7;parameter HOLD2 = 8;parameter CH3 = 9;parameter EN3a = 10;parameter EN3b = 11;parameter HOLD3 = 12;parameter CH4 = 13;parameter EN4a = 14;parameter EN4b = 15;parameter HOLD4 = 16;always @(posedge clock)beginif (reset)state <= INIT;elsebegin// defaultswr <= 1;7case (state)INIT:state <= CH1;// output channel 1CH1:beginaddr
View Full Document