Review Questions for Chapters 1 and 5, Hennessy and Patterson, 3rd Edition Chapter 1. 1. Computer systems can be characterized in many different ways, but from an architectural point of view, the system can be characterized as belonging to one of three classes. What are these classes, and what are their basic characteristics? 2. The term “architecture” applied to computer systems can mean (and has been used to mean) different things. What is the current definition of computer architecture? How is it related to “instruction set architecture?” 3. What does the term “computer organization” mean? How is it related to computer “hardware?” To demonstrate your fluency with these terms, identify two sets of two processors where each processor has the same organization. 4. Increasing the cost of which of these will also increase the corresponding cost of an integrated circuit? a. wafer size b. die size c. connections to a die (i.e. pins on the IC) d. wafer yield e. defects per unit area 5. What is the difference between the terms “cost” and “price” when applied to a computer system? What factors contribute to the mathematical difference between cost and price? 6. What does the acronym MIPS mean? (Do not answer that it is the name of a CPU manufacturer, even though it is.) Identify the canonical 1 MIPS processor (at least historically). Suppose CPU “A” is a 1 MIPS processor, and CPU “B” is a 2 MIPS processor. What does that tell us about the processors and their relative processing capabilities? 7. What is the most important measure used to compare the relative processing capabilities of two computer systems? Relate this measure to the MIPS term in the preceding question.8. Briefly describe the major types of “programs” used to compare the performance of computer systems, and summarize the advantages and disadvantages of each. 9. Suppose a computer system is needed to run multiple (different) programs. You faithfully test several proposed systems to determine their performance on each of the programs. How should you combine these measures to determine which computer system is best for the given set of programs? (You may ignore the purchase price of the systems.) 10. What is Amdahl’s law, and who was Amdahl? 11. What basic guidelines should be used in designing a computer system? In particular, to which of the guidelines does Amdahl’s law relate most strongly? Chapter 5. 1. Describe, in general, the major components of the memory system of a modern computer system. Include all components, specify how they are interconnected, give their relative speeds, sizes, and costs, and which of them are “optional” (in the sense that removal of an optional component will still yield a computer system that can function). 2. Describe, in detail, the addressing that takes place in each of the following types of caches. Assume the size of the cache in bytes is S, the size of the sets (for set associative caches) is K, and the size of the blocks in the cache as B. a. a fully associative cache b. an N-way set associative cache c. a direct mapped cache 3. What is an associative memory? 4. Is it possible to build a cache without using associative memory techniques? If so, how would it differ (both functionally and architecturally) from a cache using associative memory techniques? 5. What, in general, is the purpose of a cache memory in a computer system?6. Suppose DRAM technology advances to the point where its latency and bandwidth are equal to that of the best caches. d. Is there still a need for a cache? e. If you believe there is still a need for a cache, why? What is the purpose of the cache? How does your response here compare with your answer to question 5? 7. Is it necessary to consider writes to the I cache in a system with a split cache? Why, or why not? 8. Why is it likely that a larger cache is slower than a smaller cache? In particular, what do we mean when we say “slower?” Give a very explicit answer, perhaps including an example. It will be simpler to assume a fully associative cache. 9. Memory protection techniques are used, in part, to prevent one process from accessing regions of memory belonging to other processes. Memory protection for modern paged virtual memory systems is usually integrated with the virtual to physical address translation mechanism. Answer the following questions in relation to that environment. f. Do we need to worry about protecting cached information? Why, or why not? g. Describe a typical memory protection scheme. Indicate what additional information is present in the system, where it is located, how it is initially set, and how it is used for protection. h. What does the architecture of a typical system do when a memory protection violation is detected? (Note: do not include a page fault as a memory protection violation.) 10. Describe, in detail, the basic organization of a paged virtual memory system. Specify the major data structure required and its contents. Give a complete example showing i. the translation of a virtual address to a physical address, and j. a translation of a virtual address that results in a page fault. 11. For what does the acronym TLB stand? What does a TLB do? Relative to a machine without virtual memory, how much slower would a machine with virtual memory by if no TLB was present?12. What are reasonable choices for placement policies in caches? Describe the advantages and disadvantages of each. 13. What is a write-back cache? What cache organization(s) are usually used when a write-back cache is employed? Why? 14. What is a write-through cache? What cache organization(s) are usually used when a write-through cache is employed? Why? 15. Why is a split cache used? Describe any advantages that might be exhibited by such a system. If a split cache has advantages, why don’t all systems (with caches) use that technique? 16. Why would a system have multiple cache levels? What are the advantages and disadvantages of such a scheme? 17. If a system has multiple cache levels, and a split level 1 cache, should the level 2 cache also be split? Why, or why not? 18. What happens when the processor writes to a memory location that is present in the cache? In particular, discuss the effect of using a write buffer and/or a victim buffer on such activity. 19. What happens when the processor writes to a memory location that is