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UT EE 382C - Study Notes

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Modeling and Simulation ofData Transmission in an ADSL TransceiverEmbedded Software SystemsLiterature Survey BriefingBy Elmustafa ErwaMay 03, 2004Overview1 ADSL Transceiver Architecture1 Problem Statement1 System Modeling1 Implementation 1 ConclusionLiterature Overview1 Quadrature Amplitude Modulation (QAM) 1 Inverse Fast Fourier Transform (IFFT)1 Fast Fourier Transform (FFT)1 Cyclic Prefix (CP) Extension: Intersymbolinterference mitigation1 Equalization: channel effects suppression1 Time-domain Equalizer (TEQ)1 Frequency-domain Equalizer (FEQ)ADSL Transceiver ArchitectureA block diagram of an ADSL transceiverN/2 channelsparallel to serialQAMdecoderFreq. domain EQserial to parallelQAMencoderInput bitstreammirrordataandN-IFFTadd cyclic prefixparallel to serialDAC andtransmit filterN-FFTand removemirroreddataserialtoparallelremove cyclic prefixADC, time domain EQ, and receive filterchannelDetected bitstreamTRANSMITTERRECEIVERN/2 channelsN channelsN channelsProblem Statement1 Design a Synchronous Dataflow (SDF) model for data transmission in ADSL1 Create an abstraction for Discrete Multi-tone based ADSL modems compliant with the standards1 Implement and simulate the data transmitter and receiver in LabVIEW1 Implement physical layer functional blocks1 Make it flexible for designers to modify and optimize the implementation to fit their own designSystem Modeling1 SDF: best for DSP applications1 1 token 21 sub-symbol (real/complex number)1 cp 2size of cyclic prefix extension512+cp512+cp512+cpRECEIVERTRANSMITTERmirror data andN-IFFTQAM enc.add cyclic prefixparallel to serialDACChannelADCN-FFT and remove mirrored dataQAM dec.serial to parallelremove cyclic prefix256256256256512512512+cp512+cp512+cp512+cp512+cp512+cp512+cp512+cp512+cp512512512512256256256256256TEQFEQserial to parallelserial to parallel256Channel Model1 Carrier serving area loops1 Eight different impulse responses 1 Channel impulse response modeled as a finite impulse response filter1 Computational Model: SDF node1 Data type on arcs: Real numbers1 Data Mirroring forces the IFFT to produce real output valuesImplementation1 Implement the SDF model for data transmission subsystem using LabVIEW1 Create a hierarchical design1 Top-level virtual instrument (VI)1 Sub-VI for every functional block called by the top-level VI1 Start-up code: Ian Wong’s 802.16a simulation1 Channel Implementation: table lookup for eight different CSA loops.1 Equalization: use Embedded Signal Processing Lab Matlab TEQ Toolbox to generate the TEQ coefficientsLabVIEW Example1 Data Mirroring Block:1 Array of size 2MConclusion1 Deliverable:1 SDF model for an ADSL data transmission subsystem in LabVIEW1 Flexible framework for testing design1 Choice of channel model1 Choice of Equalization method1 Future work:1 Initialization phase1 Channel estimation1 Dynamic bit allocation tablesQuestions and


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