ICS 143 - Principles of Operating SystemsOutlineBackgroundVirtualizing ResourcesImportant Aspects of Memory MultiplexingNames and BindingBinding of instructions and data to memoryBinding time tradeoffsMulti-step Processing of a Program for ExecutionDynamic LoadingDynamic LinkingOverlaysOverlayingLogical vs. Physical Address SpaceMemory Management Unit (MMU)SwappingSchematic view of swappingContiguous AllocationRelocation RegisterFixed partitionsContiguous Allocation (cont.)Contiguous Allocation exampleDynamic Storage Allocation ProblemFragmentationFragmentation exampleCompactionPagingAddress Translation SchemeAddress Translation ArchitectureExample of PagingPage Table ImplementationAssociative RegistersEffective Access timeMemory ProtectionTwo Level Page Table SchemeTwo Level Paging ExampleMultilevel pagingInverted Page TableShared pagesShared PagesSegmentationLogical view of segmentationSegmentation ArchitectureSegmentation Architecture (cont.)Shared segmentsSegmented Paged MemoryMULTICS address translation schemeVirtual MemoryNeed for Virtual MemoryPaging/Segmentation PoliciesDemand PagingValid-Invalid BitHandling a Page FaultWhat happens if there is no free frame?Performance of Demand PagingDemand Paging ExamplePage ReplacementPage Replacement AlgorithmsPage Replacement StrategiesFirst-In-First-Out (FIFO) AlgorithmOptimal AlgorithmLeast Recently Used (LRU) AlgorithmImplementation of LRU algorithmLRU Approximation AlgorithmsSlide 65Slide 66Counting AlgorithmsPage Buffering AlgorithmProtection BitsAllocation of FramesFixed AllocationPriority AllocationGlobal vs. Local AllocationThrashingThrashing (cont.)Slide 76Working Set ModelKeeping Track of the Working SetPage fault Frequency SchemeDemand Paging IssuesSlide 81Slide 82Demand SegmentationICS 143 - Principles of Operating SystemsLectures 10,11,12 and13 - Memory ManagementProf. Dmitri V. Kalashnikovdvk (@) ics.uci.eduSlides © Prof. Nalini Venkatasubramanian.OutlineBackgroundLogical versus Physical Address SpaceSwappingContiguous AllocationPagingSegmentationSegmentation with PagingBackgroundProgram must be brought into memory and placed within a process for it to be executed.Input Queue - collection of processes on the disk that are waiting to be brought into memory for execution.User programs go through several steps before being executed.Virtualizing ResourcesPhysical Reality: Processes/Threads share the same hardwareNeed to multiplex CPU (CPU Scheduling)Need to multiplex use of Memory (Today)Why worry about memory multiplexing?The complete working state of a process and/or kernel is defined by its data in memory (and registers)Consequently, cannot just let different processes use the same memoryProbably don’t want different processes to even have access to each other’s memory (protection)Important Aspects of Memory MultiplexingControlled overlap:Processes should not collide in physical memoryConversely, would like the ability to share memory when desired (for communication)Protection:Prevent access to private memory of other processesDifferent pages of memory can be given special behavior (Read Only, Invisible to user programs, etc)Kernel data protected from User programsTranslation: Ability to translate accesses from one address space (virtual) to a different one (physical)When translation exists, process uses virtual addresses, physical memory uses physical addressesNames and BindingSymbolic names Logical names Physical namesSymbolic Names: known in a context or pathfile names, program names, printer/device names, user namesLogical Names: used to label a specific entityinodes, job number, major/minor device numbers, process id (pid), uid, gid..Physical Names: address of entityinode address on disk or memoryentry point or variable addressPCB addressBinding of instructions and data to memoryAddress binding of instructions and data to memory addresses can happen at three different stages.Compile time: If memory location is known apriori, absolute code can be generated; must recompile code if starting location changes.Load time:Must generate relocatable code if memory location is not known at compile time.Execution time:Binding delayed until runtime if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g. base and limit registers).Binding time tradeoffsEarly bindingcompiler - produces efficient codeallows checking to be done earlyallows estimates of running time and spaceDelayed bindingLinker, loaderproduces efficient code, allows separate compilationportability and sharing of object codeLate bindingVM, dynamic linking/loading, overlaying, interpretingcode less efficient, checks done at runtimeflexible, allows dynamic reconfigurationMulti-step Processing of a Program for ExecutionPreparation of a program for execution involves components at:Compile time (i.e., “gcc”)Link/Load time (unix “ld” does link)Execution time (e.g. dynamic libs)Addresses can be bound to final values anywhere in this pathDepends on hardware support Also depends on operating systemDynamic LibrariesLinking postponed until executionSmall piece of code, stub, used to locate appropriate memory-resident library routineStub replaces itself with the address of the routine, and executes routineDynamic LoadingRoutine is not loaded until it is called. Better memory-space utilization; unused routine is never loaded.Useful when large amounts of code are needed to handle infrequently occurring cases.No special support from the operating system is required; implemented through program design.Dynamic LinkingLinking postponed until execution time.Small piece of code, stub, used to locate the appropriate memory-resident library routine.Stub replaces itself with the address of the routine, and executes the routine.Operating system needed to check if routine is in processes’ memory address.OverlaysKeep in memory only those instructions and data that are needed at any given time.Needed when process is larger than amount of memory allocated to it.Implemented by user, no special support from operating system; programming design of overlay structure is complex.OverlayingLogical vs. Physical Address SpaceThe concept of a logical address space that is
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