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ICS 143 - Principles of Operating SystemsOutlineBackgroundVirtualizing ResourcesImportant Aspects of Memory MultiplexingNames and BindingBinding of instructions and data to memoryBinding time tradeoffsMulti-step Processing of a Program for ExecutionDynamic LoadingDynamic LinkingOverlaysOverlayingLogical vs. Physical Address SpaceMemory Management Unit (MMU)SwappingSchematic view of swappingContiguous AllocationRelocation RegisterFixed partitionsContiguous Allocation (cont.)Contiguous Allocation exampleDynamic Storage Allocation ProblemFragmentationFragmentation exampleCompactionPagingAddress Translation SchemeAddress Translation ArchitectureExample of PagingPage Table ImplementationAssociative RegistersEffective Access timeMemory ProtectionTwo Level Page Table SchemeTwo Level Paging ExampleMultilevel pagingInverted Page TableShared pagesShared PagesSegmentationLogical view of segmentationSegmentation ArchitectureSegmentation Architecture (cont.)Shared segmentsSegmented Paged MemoryMULTICS address translation schemeVirtual MemoryNeed for Virtual MemoryPaging/Segmentation PoliciesDemand PagingValid-Invalid BitHandling a Page FaultWhat happens if there is no free frame?Performance of Demand PagingDemand Paging ExamplePage ReplacementPage Replacement AlgorithmsPage Replacement StrategiesFirst-In-First-Out (FIFO) AlgorithmOptimal AlgorithmLeast Recently Used (LRU) AlgorithmImplementation of LRU algorithmLRU Approximation AlgorithmsSlide 65Slide 66Counting AlgorithmsPage Buffering AlgorithmProtection BitsAllocation of FramesFixed AllocationPriority AllocationGlobal vs. Local AllocationThrashingThrashing (cont.)Slide 76Working Set ModelKeeping Track of the Working SetPage fault Frequency SchemeDemand Paging IssuesSlide 81Slide 82Demand SegmentationICS 143 - Principles of Operating SystemsLectures 10,11,12 and13 - Memory ManagementProf. Dmitri V. Kalashnikovdvk (@) ics.uci.eduSlides © Prof. Nalini Venkatasubramanian.OutlineBackgroundLogical versus Physical Address SpaceSwappingContiguous AllocationPagingSegmentationSegmentation with PagingBackgroundProgram must be brought into memory and placed within a process for it to be executed.Input Queue - collection of processes on the disk that are waiting to be brought into memory for execution.User programs go through several steps before being executed.Virtualizing ResourcesPhysical Reality: Processes/Threads share the same hardwareNeed to multiplex CPU (CPU Scheduling)Need to multiplex use of Memory (Today)Why worry about memory multiplexing?The complete working state of a process and/or kernel is defined by its data in memory (and registers)Consequently, cannot just let different processes use the same memoryProbably don’t want different processes to even have access to each other’s memory (protection)Important Aspects of Memory MultiplexingControlled overlap:Processes should not collide in physical memoryConversely, would like the ability to share memory when desired (for communication)Protection:Prevent access to private memory of other processesDifferent pages of memory can be given special behavior (Read Only, Invisible to user programs, etc)Kernel data protected from User programsTranslation: Ability to translate accesses from one address space (virtual) to a different one (physical)When translation exists, process uses virtual addresses, physical memory uses physical addressesNames and BindingSymbolic names  Logical names  Physical namesSymbolic Names: known in a context or pathfile names, program names, printer/device names, user namesLogical Names: used to label a specific entityinodes, job number, major/minor device numbers, process id (pid), uid, gid..Physical Names: address of entityinode address on disk or memoryentry point or variable addressPCB addressBinding of instructions and data to memoryAddress binding of instructions and data to memory addresses can happen at three different stages.Compile time: If memory location is known apriori, absolute code can be generated; must recompile code if starting location changes.Load time:Must generate relocatable code if memory location is not known at compile time.Execution time:Binding delayed until runtime if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g. base and limit registers).Binding time tradeoffsEarly bindingcompiler - produces efficient codeallows checking to be done earlyallows estimates of running time and spaceDelayed bindingLinker, loaderproduces efficient code, allows separate compilationportability and sharing of object codeLate bindingVM, dynamic linking/loading, overlaying, interpretingcode less efficient, checks done at runtimeflexible, allows dynamic reconfigurationMulti-step Processing of a Program for ExecutionPreparation of a program for execution involves components at:Compile time (i.e., “gcc”)Link/Load time (unix “ld” does link)Execution time (e.g. dynamic libs)Addresses can be bound to final values anywhere in this pathDepends on hardware support Also depends on operating systemDynamic LibrariesLinking postponed until executionSmall piece of code, stub, used to locate appropriate memory-resident library routineStub replaces itself with the address of the routine, and executes routineDynamic LoadingRoutine is not loaded until it is called. Better memory-space utilization; unused routine is never loaded.Useful when large amounts of code are needed to handle infrequently occurring cases.No special support from the operating system is required; implemented through program design.Dynamic LinkingLinking postponed until execution time.Small piece of code, stub, used to locate the appropriate memory-resident library routine.Stub replaces itself with the address of the routine, and executes the routine.Operating system needed to check if routine is in processes’ memory address.OverlaysKeep in memory only those instructions and data that are needed at any given time.Needed when process is larger than amount of memory allocated to it.Implemented by user, no special support from operating system; programming design of overlay structure is complex.OverlayingLogical vs. Physical Address SpaceThe concept of a logical address space that is


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UCI ICS 143 - LECTURE NOTES

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