Implementation of Turbo Code in TI TMS320C8xTurbo CodesEncoder of Turbo CodeConvolutional (RSC) EncoderViterbi Algorithm for Convolutional CodeA Posteriori Probability Algorithm (APP)Iterative algorithm of Turbo CodeSlide 8Implementation in TMS320C8xMemory location analysisSlide 11Implement forward recursionImplementation of Turbo Codein TI TMS320C8x Hao ChenInstructor: Prof. Yu Hen HuECE734 Spring 2004Turbo Codes Shannon established the fundamental theory about the transmission rates in digital communication system The practically feasible channel utilization is almost closed to the theory communication capacity limit;The lower complexity of decoder is gained through two separately decoder compared with one decode;Turbo Codes play an important role in the next generation communication systemEncoder of Turbo CodeParallel concatenation convolutional codes (PCCC)Output sequence has near uniform distribution probability with well designed interleaver.Convolutional (RSC) Encoder Generator matrix of a rate ½ RSC code can be defined:( )( )( )1g zG zh z� �=� �� �Viterbi Algorithm for Convolutional CodeP(i,t) : The min cost when the state is i at the time t.S(i, t): The path from time 1 to t corresponding to the P(i,t).A Posteriori Probability Algorithm (APP)Minimize the symbol error probabilityThe code is decided by the log-likelihood ratioOriginal infromation at time t ( )( )( )111|log0 |TttTtP D LDP D L=L ==( )1 00ttDDotherwise� L �=��1TL : The received sequence from time 1 to time TIterative algorithm of Turbo CodeTwo component decoders serially concatenated via an interleaverThe priori probabilities obtained from first decoder is used at the second decoderIterative algorithm of Turbo CodeUse priori information to caculateForward recursion: t=1, 2, …, TBackward recursion: t=T, T-1, …, 2, 1 log-likelihood ratio ( )( )1, , |tt t t ti m P D i L S mg-= = =( ) ( )( )( )( )1 1 10,1, , ,t t t t tim M i m i M i ma a g- - -==�( ) ( )( )( )1 1 10,1, ,t t t tim M i m i mb b g+ + +==�( )( ) ( ) ( )( )( ) ( ) ( )( )1 111 111, 1,log0, 0,statestateMt t t tmtMt t t tmm m M mDm m M ma g ba g b- +=- +=L =��Implementation in TMS320C8x Modify the algorithm to save memoryApply two decoders in one DSP; (time share)Map the algorithm to utility multiprocessor of TMS320C8x more efficiently;Memory location analysisStep 1: Receive the code sequence; get the for decoder1. ( ),ti mfMemory location analysisStep 4: Calcualte of decoder 1 with ( )tmb( )tma( ),ti mgImplement forward recursion Map forward recursion to four parallel processors of TMS320C8xNo additional memory is needed to store temporary
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