Objectives and DeliverablesBackgroundDescription of Idea using Block DiagramImplementation ScheduleTeam Member ResponsibilitiesTesting Environment8.Hardware/Software PercentagesCostReferencesMicroprocessor System Design Using Coldfire Embedded Processor Team 9 Marshall Belew Delilah Dabbs Terry Dahlke Brian Sladecek CPSC 483 - 501 Proposal  2000 CPSC 483 - 501 Team 9Proposal Table of Contents 1. OBJECTIVES AND DELIVERABLES.............................................................................................................1 2. BACKGROUND...................................................................................................................................................3 3. DESCRIPTION OF IDEA USING BLOCK DIAGRAM.................................................................................4 4. IMPLEMENTATION SCHEDULE...................................................................................................................5 5. TEAM MEMBER RESPONSIBILITIES ..........................................................................................................6 6. TESTING ENVIRONMENT ..............................................................................................................................7 8. HARDWARE/SOFTWARE PERCENTAGES .................................................................................................8 9. COST.....................................................................................................................................................................9 10. REFERENCES ..............................................................................................................................................10 iiProposal 1. Objectives and Deliverables Our proposed project is to create a new lab manual for CPSC 462 – Microcomputer Systems based on the MCF5206e processor/evaluation board. This would include researching, designing and testing approximately 8 new labs. In researching other university's curriculum, it is our intent to provide a set of labs comparable to industry standards and a step above what is currently available. The following is a list of our proposed labs: 1.1 Introduction to the Coldfire embedded processor The Motorola MCF5206e Coldfire Processor/Evaluation Board used for designing microcomputer systems for data acquisition and industrial controls. In this lab, you will learn the basics of how to interface with the MCF5206e by transmitting files and downloading logs of terminal output. 1.2 Assembly Programming on the Coldfire processor This lab will introduce you to some of the basics of assembly language programming on the MCF5206e microprocessor. We will be consulting the Motorola MCF5206 Programmer’s Reference Guide for specific assembly language instructions. 1.3 Integration between C and Assembly Write a C program that calls subroutines written in assembly. 1.4 Memory Interface Using multiple SRAM chips, this lab will build and implement a memory decoder to access external memory. 1.5 DMA Using the memory created in the memory interface lab, they will create a RAM disk and show that they read and write from it. 1.6 Keypad/LCD A 4x4 button keypad will be used to provide a password with a 4-bit keypad data signal. This will depict which key has been pressed as well as generate an interrupt preempting our CPU to read and respond to the 4-bit control signal. An LED will be used to display whether access has been granted or denied. 1.7 Serial Communication Demonstrate two-way communication between the MCF5206e and the PC. Proposal Date 4/26/1999 4:20 PM Page 1Proposal 1.8 Digital/Analog and Analog/Digital Integration The purpose of the A/D Subsystem is to obtain an analog signal from a microphone, digitize the analog signal, and provide the digitized audio to be received by he M5206eLITE board for storage and playback. The purpose of the D/A Subsystem is to take digital inputs from the evaluation board, convert this digital signal to analog and send the analog signal to a speaker for playback of the original audio signal obtained by the A/D Subsystem. 1.9 Bonus Labs (time permitting) The bonus labs will tie in previous assignments into a larger project. For example, a security system. Proposal Date 4/26/1999 4:20 PM Page 2Proposal 2. Background The current use of hardware and software in the CPSC 462 labs includes the following: • 68040 Processor • MVME 162 Embedded Controller Board • PC’s w/ Serial Interface • Integrated 162bug Debugger Due to the obsolete hardware and malfunctioning equipment that is being used and advancement of new technology, it was proposed by the department to create a new lab manual using the new Coldfire Processor/Evaluation Board. We intend to create new labs with improved clarity and documentation. This manual will provide all of the information needed to complete each lab. It will be the responsibility of the Teaching Assistant/Professor to edit information that he/she wanted the students to research. Therefore, the new labs will be using the following hardware and software: • MSF5206e Coldfire Processor/Evaluation Board • PC’s w/ Serial Interface • C Compiler (Green Hill) • Integrated Debugger • FPGA’s, IC’s, etc. There are other processors available, however we chose the Coldfire Processor because of its compatibility with the current CPSC 462 textbook. It is also very cost efficient for implementing in undergraduate labs. In comparison to other products available, the Coldfire Processor/Evaluation Board is about $1600 less. Also, this processor has a much lower learning curve than the other products available. Last semester PDACS 2 group used the Coldfire Processor/Evaluation Board in their project. From their experience, they determined the best available compiler was the Green Hill Compiler/Development Kit. They had some difficulty interfacing with the J1 and J2 connectors on the Coldfire Board, because there is not a readily available connector. Unless we can obtain the correct connector in a timely fashion, we will use last semester’s handmade ribbon cable. Proposal Date 4/26/1999 4:20 PM Page 3Proposal 3. Description of Idea using Block Diagram Figure 1. PC to MCF5206e Processor Connection Proposal Date 4/26/1999 4:20 PM Page 4Proposal 4. Implementation Schedule Week Date Task 1 1/18/00 – 1/21/00 Research and