6.301 Solid-State Circuits Recitation 16: More on Op-Amp Tricks Prof. Joel L. Dawson CLASS EXERCISE: Consider the following single-stage operational amplifier. Determine which input is inverting, and which input is non-inverting. This circuit uses a topology trick called a folded cascode: For the op-amps, it allows us to use a cascode current mirror without having to stack a large number of devices. VOUTBIAS2BIAS1IBIN 2IN1!IBIAS!Normal Cascode “Folded” Cascode6.301 Solid-State Circuits Recitation 16: More on Op-Amp Tricks Prof. Joel L. Dawson Page 2 Now let’s continue our exploration of op-amp design tricks by looking at the LM101. If we draw out its input stage, we again see this funny trick that we saw with the 741: There are a couple of problems that this input stage very clearly addresses. The first is the “level-shifting problem.” To see how this shows up, consider that in many processes, we’d prefer to use only NPN’s in the signal path: Why do we do this? I!+!To next stage Q3CBA+1I1I2R2R1INPUT 2!INPUT1Q6Q2Q5Q1Q4D!Stage 1 Stage 26.301 Solid-State Circuits Recitation 16: More on Op-Amp Tricks Prof. Joel L. Dawson Page 3 The voltage at (A) is not going to be much higher than a VBE above the negative supply rail. This is because we rely on stage 2 for a lot of gain, and a high voltage across R2 implies a high degree of degeneration. To see this, consider that the gain of stage 2 is given approximately by av=gm1 + gmR2!"#$%&r0 NPNr0 PNP=gm1 + gmR2!"#$%&1 + gmR2( )VA NPNI2VA PNPI2'())*+,, Let VA NPN= VA PNP= VA (Devices have identical early voltages.) Then, 1 + gmR2( )VA NPNI2VA PNPI2!"##$%&&'12 + gmR2VAI2()*+,- Now we can calculate the gain: av=gm1 + gmR2!"#$%&12 + gmR2!"#$%&VAI2=I2VT1 +I2VTR2!"###$%&&&12 +I2VTR2!"###$%&&&VAI2!"#$%&=VAVT11 +I2VTR2!"###$%&&&12 +I2VTR2!"###$%&&& Now, I2R2= VD, so av=VAVT12 + 3VDVT+VD2VT2!"####$%&&&&'VAVTVT2VD2= VTVA1VD2 Want VD small! (Emitter degeneration is small)6.301 Solid-State Circuits Recitation 16: More on Op-Amp Tricks Prof. Joel L. Dawson Page 4 The problem is that VBis only a little more than 2VBE above the negative supply rail. Suddenly, we’re restricted to very low common-mode input levels! This, in a nutshell, is the level-shifting problem. To see how PNP devices could help us, look at… Now, of course, we have plenty of common-mode input range. This solution is fine if we have 2N3906s lying around (nice, high !Fs). But in the IC world, where ! may be 5 for PNPs, and where PNPs are slow to boot, this solution gives a pretty poor input stage. Looking back at the LM101 input stage, we can see that the emitter follower and common base input stage solves the level-shifting problem. Also, our input current now depends on !Fof the NPNs, and the common base configuration squeezes the most bandwidth we can out of the PNPs! Now let’s just make sure we understand how this stage really functions… +1!INPUT 2INPUT1I1!6.301 Solid-State Circuits Recitation 16: More on Op-Amp Tricks Prof. Joel L. Dawson Page 5 An ordinary differential pair gives good differential gm w/zero common-mode gm: Flipping things over for the common-base stage I!gm=ICVTgm= 0!!Common-mode 1/2 circuit Difference mode 1/2 circuit !! ! !I! !Common-mode 1/2 circuit Difference mode: Normal common-base stage Base current is fixed, so collector current is