Digital Filter Design ToolsOutlineMotivationProject GoalsCurrent StatusVisualizationRetimingSlide 8Slide 9Slide 10FoldingConclusionQuestionsDigital Filter Design Digital Filter Design ToolsToolsEric HillEric HillLixin SuLixin SuECE 734ECE 734OutlineOutlineMotivationMotivationAccomplishmentsAccomplishmentsConclusionConclusionMotivationMotivationLarge design spaceLarge design space•Many transformations available to Many transformations available to optimize filter designoptimize filter designMany different design goalsMany different design goals•Clock period, hardware cost, power Clock period, hardware cost, power consumptionconsumption•All interdependent, tradeoffs requiredAll interdependent, tradeoffs requiredDesigners need automatic design Designers need automatic design toolstoolsProject GoalsProject GoalsCreate an automatic design tool Create an automatic design tool •Rapidly explore design spaceRapidly explore design space•Lower total design overheadLower total design overhead•Open-endedOpen-ended•High level input formatHigh level input format•Graphical representationGraphical representationCurrent StatusCurrent StatusFeatures ImplementedFeatures Implemented•Graphical RepresentationGraphical Representation•Retiming (clock and register Retiming (clock and register minimization)minimization)•Folding (limited functionality)Folding (limited functionality)•UnfoldingUnfolding•Iteration bound, critical path calculationIteration bound, critical path calculation•Support for high level input formatSupport for high level input formatVisualizationVisualizationUsed Graphviz Used Graphviz graph drawing graph drawing softwaresoftware•Developed by AT&T Developed by AT&T Research LabResearch LabOur design tool Our design tool generates output generates output files which are files which are readable by readable by Graphviz Graphviz x+ x+DD2DRetimingRetimingClock Period Minimization (Sec 4.4.2)Clock Period Minimization (Sec 4.4.2)•Create the Constraint graph for the Create the Constraint graph for the original DFGoriginal DFG•Apply Floyd-Warshall algorithm to derive Apply Floyd-Warshall algorithm to derive all-pairs shortest pathall-pairs shortest path•Apply all possible clock periods to find Apply all possible clock periods to find the smallest possible clock periodthe smallest possible clock periodRetimingRetimingRegister Minimization (Sec 4.4.3)Register Minimization (Sec 4.4.3)•Derive feasibility constraints from the original Derive feasibility constraints from the original DFGDFG•Create a new DFG by inserting dummy nodesCreate a new DFG by inserting dummy nodes•Create the constraint graph for the new DFGCreate the constraint graph for the new DFG•Apply Floyd-Warshall algorithm to derive clock Apply Floyd-Warshall algorithm to derive clock period constraintsperiod constraints•Derive the cost function from the new DFGDerive the cost function from the new DFG•Use Matlab (linprog) or GAMS to solve the linear Use Matlab (linprog) or GAMS to solve the linear programming problem (defined by the cost programming problem (defined by the cost function, feasibility constraints and clock period function, feasibility constraints and clock period constraints) constraints)Original DFGNew DFGClock = 3Regs = 4Clock= 2Regs = 5Clock MinimizationOriginal DFGNew DFGClock = 2Regs = 4Clock = 3Regs = 4Clock & register minimizationFoldingFoldingIt supports limited functionalities.It supports limited functionalities.•Check if a folding scheme is possibleCheck if a folding scheme is possible•Minimize the clock period under one Minimize the clock period under one folding schemefolding schemeConclusionConclusionExperiences from designExperiences from design•Input format is important to the success Input format is important to the success of a toolof a tool•Algorithm implementations are the most Algorithm implementations are the most time-consuming parttime-consuming part•GUI is importantGUI is importantQuestionsQuestionsI have no professional training. I already gave my best. I have no regrets at all. -- William Hung on American
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