Memory HierarchyConnection of memory to the ProcessorControl ConnectionsMain Memory CharacteristicsTiming CharacteristicsAddress/Data ConnectionsMemory ChipsPowerPoint PresentationSemiconductor Memory Device ArchitectureDECODER REVIEWBuffersROM4x5 PROM OrganizationBasic Types of RAMStatic RAMStatic RAM CellDynamic RAMSIMMS and DIMMS8M x 32 (32MB) SIMMFlash MemoryFlash Memory ExamplesMain Memory TechnologiesMemory HierarchyRegistersCacheMain MemoryFixed Disk(virtual memory)TapeFloppyZipCD-ROMCD-RWRCost/BitAccess/SpeedCapacityConnection of memory to the ProcessorMARMDRMemoryUp to 2k addressable locationsWord length = n bitsK-bit address busN-bit data busControl linesR/W’, IRQ,IE, etc…Control ConnectionsMEMData[N-1:0]Address[log2(K)-1:0]CSOE WEChip Select – must be asserted before Memory will respond to read or write operation. If negated, data bus is high impedance. May have more than one – if so, all must be asserted.OE – Asserted for read operation, Memory will drive data lines. WE – Asserted for a write operation (Memory inputs data from data pins, processor writes to memory).There may only be one control line (R/W)Main Memory Characteristics• Semiconductor Chips Housed in DIP Packages DIP Packages Mounted on SIMM, DIMM Circuit Boards• Characteristics Access Times (read,write,erase) Faster is Better (varies from minutes to a few ns) Volatility Ability to Retain Data After Power is Removed Power Consumption Less is Better (mW to nW typical) Density Larger is Better (bits/sq. micron or transistors/bit) Cost Less is BetterTiming Characteristics•Memory Access Time ––The time from a valid address being placed on the address bus until valid data appears on the data bus.•Memory Write Time – –The time from when a valid address is placed on the address bus until the value on the data bus is captured by memory.•Faster is Better!!!!Address/Data ConnectionsMEMData[N-1:0]Address[log2(K)-1:0] K x NK locations, N bits per locationAddress bus has log2(K) address lines, data bus has N data lines.Address pins labeled An-1 – A 0 where A0 is least significantData pins labeled Dn-1 – D0 where D0 is least significantMemory Chips•Most devices are 8-bits wide (Byte-addressable); some are 16-bits, others 1 bit wide.•Listing refer to memory locations x bits/location–1Kx8, 16Kx8•Often classified by total bit capacity–1Kx8 (8K device)–64Kx4 (256K device)Can see use of CS, W and OE signals.Pentium Memory System – 4G capacity 64 bit data bus, 32 bit Address BusSemiconductor Memory Device Architecture24DecoderA1A0D3D2D1D0D4Storage Cell ArrayBuffersDECODER REVIEW• n×2n Device– n encoded inputs– 2n decoded outputs24DecoderA1A0D3D2D1D0A1A0D3D2D1D00 00 11 01 10 0 0 10 0 1 00 1 0 01 0 0 0Buffers• Differential Amplifier– Gain: Av– 2 input voltages, 1 output voltage referenced to common groundVinVout= Av VinAv• Single-Ended Amplifier– Gain: Av– 1 input voltage, 1 output voltage referenced to common groundV1Vout= Av (V1-V2)AvV2+-ROM•ROM – Read Only Memory - a type of memory that cannot be written, can only be read. Contents determined a manufacture time.–ROM is non-volatile – contents remain even when power is off.•PROM – Programmable ROM – a type of memory whose contents can be programmed by the user–OTP – One Time Programmable, a PROM is OTP if contents can be programmed only once. •EEPROM – Electrically Erasable PROM – contents can be erased electrically by the user.–Memory is not alterable under ‘normal’ operation.4x5 PROM Organization1-Bit Storage CellBasic Types of RAM•RAM – Random Access Memory –memory that can be both read and written during normal operation.–Contents are non-volatile, will be lost on power off.Static RAMFast access time (used for off-processor cache)Does not have to be refreshedDynamic RAMSlower access timeMust be refreshedmuch more denseStatic RAM•Fastest access time of memory types. Typically the type of RAM used primarily in Level -2 cache.•Read, Write operations take equal amounts of time.•Access to any ‘random’ location takes same amount of time.•Basic memory cell is a latch, takes 6 transistors per memory bit.SRAM –static - high speed memory that does not require a refresh operation. Much faster than dynamic RAM, with speeds between 8-12 nsec.•PBSRAM – pipeline burst - static RAM that has been enhanced by the use of burst technology. Multiple requests can be collected together and sent as a single pipelined request. Bus speeds of 75MHz or higher.Static RAM CellDynamic RAM•Must be refreshed within less than a millisecond•Most main memory is dynamic RAM (least expensive)–FPO Fast Page Mode – Can only match speed of 30MHz data bus–EDO Extended Data Out – 66MHz motherboards or less–BEDO – burst enhanced data-out – –SDRAM – Synchronous dynamic – operates synchronously with system clock and data bus. Can handle 100MHz or more–DDR – Double Data Rate – can transmit data on both edges of the clock–RD – Rambus – operates in a serial fashion rather thanSIMMS and DIMMS•Mount Memory Device Packages on Circuit Boards toConserve Space•30-Pin SIMM – First – Single Byte Access•Used in “Pairs” Since in x86 1 Word=16 bits•72-Pin SIMM – Four Byte (32 bit) Access•Need Pairs for Pentium+ Since 64 bit Data Bus•168-pin DIMM – Eight Byte (64 bit) AccessSIMM – Single In-Line Memory ModuleDIMM – Dual In-Line Memory Module8M x 32 (32MB) SIMMFlash Memory•Hybrid of RAM/ROM•Have basically replaced EEPROMs•Memory parts can be electrically erased and reprogrammed without removing the chip.•The entire chip (or block) must be erased at one time. Individual byte erasure is not possible.•Silicon Hard Disks – PCMCIA (Personal Computer Memory Card International Association) – credit card size •ROM BIOS, Font cards for printers, automotive industry diagnostic codes, modems, Ethernet cardsFlash Memory Examples•Computer BIOS Memory•Compact Flash (In Digital Cameras)•Smart Media (Digital Cameras)•Memory Stick (Digital Cameras)•PCMCIA Type I and Type II (solid state disks in laptops)•Memory Cards for video game consolesMask Programmable ROMOTP ROMUV-EPROMEEPROMFLASH MEMORYCACHE SRAMSSRAMDRAM SDRAMMVolatile x x x xNonvolatile and byte erasable X Capacitor Storage Cell x xFastest Access
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