Design of Optimized Engine for Direct Sequence Spread Spectrum Transceiver ECE 734 Project Report Spring 2004 Prepared By: Harish Rajagopal Varun NawaniContents 1 Introduction 2 Theoretical Background for Direct Sequence Spread Spectrum 3 Implementation of Direct Sequence Spread Spectrum Engine 3.1 Acquisition 3.2 Tracking 3.3 Overall Design Implementation 3.4 System Optimization 3.4.1 Digital Matched Filter Optimization 3.4.2 Loop Filter Optimization 4 Simulation And Results 4.1 Verification of Digital Matched Filter Implementation 4.2 Performance of Direct Sequence Spread Spectrum Engine 4.3 Acquisition Performance 4.4 Tracking Performance 4.5 Results 5 Conclusion 6 References Appendix A: Verilog Code for Optimized DSSS Engine Appendix B: Verilog Code for Un-Optimized DSSS Engine1. Introduction The interference in the wireless communication channel leads to spreading of the data to be transmitted over the entire frequency range thereby making it resistant to noise. One of the popular techniques for spreading of the data is Direct Sequence Spread spectrum (DSSS). It is used in popular applications such as IEEE 802.11b and CDMA. The data that is to be transmitted wirelessly is multiplied with a high frequency pseudo-random noise (PN) sequence at the transmitter. This causes the spreading of the power spectral density. The basic building blocks of the transceiver unit in DSSS consist of a pseudo random sequence generator, Digital Matched filter, Delay locked loop which consists of a detector, loop filter and numerically controlled oscillator. At the receiver side the data is again multiplied with the same PN sequence that is locally generated to recover back the original data symbols. The most sensitive part of a Direct Sequence Spread Spectrum system is the synchronization of the transmitter’s pseudo random sequence to that of the receiver where an offset of even one chip cycle can result in noise rather than a de-spread symbol sequence. Our project mainly focuses at the design of a fast Direct Sequence Spread Spectrum engine such that there is a faster correlation between the pseudo random sequence at the transmitter and the receiver. 2. Theoretical Background for Direct Sequence Spread Spectrum The basic building block of the DSSS transmitter is shown below. The symbol to be transmitted is multiplied with the PN sequence to generate the spread symbol. The symbols are converted to analog form and are transmitted after the modulation.Figure 1: Basic DSSS Transmitter The multiplication of the symbol with the PN sequence causes the increase in the bandwidth by a factor known as the processing gain (PG). PG is calculated by the ratio of symbol period, Ts, to the chip period of the PN sequence, Tc: where Ts >> Tc. =CSTTPG10log.10 This results in the lowering of the peak power spectral density by the processing gain. Figure 2: Power Spectral density of Transmitted signal The transmitted spread spectrum signal is thus a wideband signal that can hardly be differentiated from channel noise, if the processing gain is high enough. The amount of degradation faced by the signal in the transmission channel is dependent on the degree and characteristics of interference sources present inthe channel. One of the advantages of spread spectrum its resistance to narrowband noise. As we can see from the figure below, the spectrum of the signal is so much wider than that of the narrowband interferer that most of the signal power can still be received. Figure 3: Narrow band Interference in Transmitted signal The basic building block of the receiver is shown below. The received signal is multiplied with a local replica of the transmitter’s PN sequence to despread the signal the original data symbols. The local oscillator at the receiver is assumed to be in synchronization with the oscillator at the transmitter. Figure 4: Basic DSSS Receiver The spread spectrum of the symbols recovered by the receiver along with the noise added during transmission is shown below.Figure 5: Power Spectral Density in the received signal As we can see the interference is spread by the receiver as the data is being despread. The timing diagram of the entire process is shown below. Figure 6: Timing sequence of Spreading and Despreading Direct sequence spreading can be done with short or long PN sequences. A short PN sequence, Nc chips long, has a period equal to that of the symbol Ts. Therefore, Nc.Tc=Ts where Tc is the chip period. A long code on the other hand has a length several symbols long, Nc.Tc >> Ts. Therefore each symbol is spread by a seemingly different chip pattern. If the PN sequences are perfectly orthogonal then there is no interference between the users after dispreading and the privacy of the communication of each user is protected. There are manytypes of spreading sequences and methods of producing them. The type of sequence we use depends on the communication channel using it. The most sensitive aspect of a DS system is the synchronization of the transmitter’s PN sequence to that of the receiver where an offset of even one PN chip can result in noise rather than a despread symbol sequence. Synchronization is composed of two elements namely acquisition and tracking. These can be viewed as the alignment of the PN sequences, and the maintenance of this aligned state. Synchronization systems use correlators to determine the correlation of the received signal to the local replica of the transmitted PN sequence. When a high correlation value is detected, acquisition has been achieved. How fast the data is received depends on the how fast the correlation between the PN sequences is achieved. 3. Implementation of Direct Sequence Spread Spectrum Engine The DS spreading code synchronization system consist of two processes: acquisition and tracking. The acquisition process provides the initial synchronization between the local and incoming spread sequences with an accuracy of + 0.5 of the chip clock. The tracking processes then achieves fine synchronization and maintains it. 3.1 Acquisition Correlator architectures are often categorized as either serial (active) or parallel (passive). Serial correlators multiply the received signal with the local PN sequence and accumulate the result on a chip-by-chip basis for the duration of a symbol. If the required threshold is not met by the correlation value, a new correlation process is initiated.
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