Chapter 1.2: Introduction1.2 Computer-System OperationMore on ControllersSlide 4Common Functions of InterruptsInterrupt HandlingSlide 7Interrupt Timeline1.2.2 Storage StructureMemory Access - SimplificationSimplified Instruction ExecutionSimplified Instruction Execution - ExampleStorage HierarchySlide 14Storage-Device HierarchyCachingPerformance of Various Levels of StorageEnd of Chapter 1.2Chapter 1.2: IntroductionChapter 1.2: IntroductionThese slides, originally provided by your authors, have been modified by your instructor.1.2Silberschatz, Galvin and Gagne ©2005Operating System Concepts1.2 Computer-System Operation1.2 Computer-System OperationI/O devices and the CPU can execute concurrently.Device controllers normally in charge of a particular device type.USB Controllers – in very common use for flash drives, printers, cameras, many more external devicesDisk controllers may have several disks connected. Disk controller must synchronize data being written to and retrieved from disks that it is controlling.Deals with timing, buffering, contention, actual data transfer and handling; parity checking, and more! .Even when device is ready: –seek time, rotational delay, head select, data transfer.1.3Silberschatz, Galvin and Gagne ©2005Operating System ConceptsMore on ControllersMore on ControllersDevice controller typically have a local buffer storage containing temporary storage of dataData is to be written to one of the devices the controller is ‘controlling’ or perhaps written to RAM. Controller operations are asynchronous from CPU.Remember, these controllers are like little computersexecute special programshave local buffer storage, registers for data transfer, etc.Some of these registers are different than CPU registers Shift registers, etc.The type of I/O transfer described here and the next slide is effective for low speed / low volume I/O1.4Silberschatz, Galvin and Gagne ©2005Operating System ConceptsMore on ControllersMore on ControllersWhen data is to be written to, say, a disk, the device controller must copy the data from its own local storage to the device itself (and conversely for a read). Device Drivers, part of the operating system, starts the process by loading registers within the device controller.Among other things, register contents indicate desired operation disk controller is to take (read, write, addresses of target…)Device controller can now transfer data to/from its local buffer. Once the data is transferred from, say, primary memory or keyboard to/from the device controller’s local storage, the device controller sends an ‘interrupt’ back to device driver.The device driver returns control back to the operating system – maybe sending a pointer to the data just read into primary memory; sometimes status indicators are returned. The CPU now process the interrupt by resuming processing possibly with the same process or some other process.1.5Silberschatz, Galvin and Gagne ©2005Operating System ConceptsCommon Functions of InterruptsCommon Functions of InterruptsThe CPU can accommodate the interrupt by transferring control to (generally) an interrupt vector located in a reserved part of memory.Each location in this interrupt vector (table) contains an address of a routine to ‘handle’ the particular type of interrupt to be accommodated. These routines are called interrupt handlers.There is a number of classes of interrupts and each of these interrupt handlers is developed to address a specific class of interrupt.Some typical interrupts (again, much more later) includeInput/output interruptsSupervisor calls (system calls)Machine Check interrupts (a device fails)External interrupt (computer operator can interrupt)Input/OutputOthers…1.6Silberschatz, Galvin and Gagne ©2005Operating System ConceptsInterrupt HandlingInterrupt HandlingSo, what does the CPU do in response to the interrupt?While what the CPU is unique to the type of interrupt, let’s assume it was running some other program: So1. The Interrupt architecture must save the address of the interrupted instruction (instruction address in, say, the executing program) and, in general the state of your program when interrupted (register settings, buffer contents, etc.).2. Determine type of interrupt (all interrupts are not created equal)3. Disable ‘certain’ interrupts from interrupting the handling of ‘this’ interrupt (of course, any interrupts that arrive must be stored for future handling…).4. Accommodate the interrupt (do what needs to be done)5. Return to interrupted operations – or maybe to some different process.1.7Silberschatz, Galvin and Gagne ©2005Operating System ConceptsInterrupt HandlingInterrupt HandlingSo operating system software is highly complicated. These kinds of Operating Systems are said to be interrupt driven.Much more later when we discuss Processor Management.This is only a very brief overview…1.8Silberschatz, Galvin and Gagne ©2005Operating System ConceptsInterrupt TimelineInterrupt TimelineConsider: the CPU is busy executing some process.In the background, an I/O device, say a disk, is transferring data from itself into primary memory.When the transfer is complete, a signal (interrupt) is sent to the CPU.The CPU can suspend ‘current’ operations, and process the I/O interruptOf course at this time, the I/O device becomes idleNote the CPU time to process the interrupt is very small (much smaller than chart indicates).Then the CPU resumes normal processing (whatever that might be) It might resume suspended process or start executing a different process.This is sufficient for now. Much more later.CPU processing the interruptCPU resumes processing…I/O device is now idle again.1.9Silberschatz, Galvin and Gagne ©2005Operating System Concepts 1.2.2 1.2.2 Storage StructureStorage StructurePopular Misconceptions and Basic Concepts.For a program to be executed by the central processor (CP / CPU – note that I use the terms interchangeably) the program instructions must be first loaded into main memory (primary memory / central memory – also synonymous terms).Programs are normally stored on disk or some other medium until needed. Then they are ‘read into’ primary memory in order to be executed by the CPU.Individual instructions are executed in the CPU one at a
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