EE 166 Design ProjectDiagram of 4-Bit ComparatorSpecificationMethodSub – Systems of our DesignEqual ModuleLess Than ModuleGreater Than ModuleFull SchematicSchematic of 2 Input XNOR GateSchematic of Equal ModuleSchematic of LT ModuleSchematic of GT ModuleSchematic of 4-bit Comparator4-bit Comparator Test Bench ConnectionTransient ResponseSlide 17PowerResultsLayout of 2-Input XNOR GateLayout of Equal ModuleLayout of LT ModuleLayout of GT ModuleLayout of 4-bit ComparatorExtracted View of 4-bit ComparatorLVS ReportsExtracted Transient ResponseExtracted Power MeasureSlide 29ConclusionInitial Full SchematicFinal Full SchematicSlide 33EE 166 Design ProjectEE 166 Design Project 4 – Bit Magnitude ComparatorDesign ByMan Hong LiuKee-Hoon ChoiTak Chuen WongDiagram of 4-Bit ComparatorDiagram of 4-Bit Comparator4 – Bit Magnitude ComparatorA3 A2 A1 A0 B3 B2 B1 B0GT EQ LTSpecificationSpecificationPower : Less than 0.25 WFrequency : 200 MHzAMI06 TechnologyMethodMethodUsed Velilog to verify our logicHand Calculation to determine approx. delay time and speed.Completed all the logic gate: AND, XNOR, NAND, Inverter (transistor size, simulation)Integrated all parts (Modification if needed)Layout (Modification if needed)Extracted SimulationSub – Systems of our DesignSub – Systems of our DesignThree Sub-Systemsa. Equal Module (A = B) b. Less than Module (A < B) c. Greater than Module (A > B)Equal ModuleEqual ModuleOutput high when two inputs equal (A = B)Four 2-input XNOR GateOne 4-input NAND GateLess Than ModuleLess Than ModuleOutput high when input A is less than input B. (A < B)Three InvertersFive 2-input NAND GatesOne 3-input NAND GateTwo 4-input NAND GatesThree signal from EQ module (EQ3, EQ2, EQ1)Greater Than ModuleGreater Than ModuleOutput high when input A is greater than input B. (A > B)Three InvertersFive 2-input NAND GatesOne 3-input NAND GateTwo 4-input NAND GatesThree signal from EQ module (EQ3, EQ2, EQ1)Full SchematicFull SchematicSchematic of 2 Input XNOR GateSchematic of 2 Input XNOR GateSchematic of Equal ModuleSchematic of Equal ModuleSchematic of LT ModuleSchematic of LT ModuleSchematic of GT ModuleSchematic of GT ModuleSchematic of 4-bit ComparatorSchematic of 4-bit Comparator4-bit Comparator Test Bench Connection4-bit Comparator Test Bench ConnectionTransient ResponseTransient ResponseTransient ResponseTransient ResponseA3 < B3A3 > B3A = BPowerPowerResultsResultsPower : Approx. 0.26 mW (within 5 %)Time Delay : 830 ps for EQ moduleGood !!! We met our specificationLayout of 2-Input XNOR GateLayout of 2-Input XNOR GateLayout of Equal ModuleLayout of Equal ModuleLayout of LT ModuleLayout of LT ModuleLayout of GT ModuleLayout of GT ModuleLayout of 4-bit ComparatorLayout of 4-bit ComparatorExtracted View of 4-bit ComparatorExtracted View of 4-bit ComparatorLVS ReportsLVS ReportsExtracted Transient ResponseExtracted Transient ResponseExtracted Power MeasureExtracted Power MeasureResultsResultsPower : Approx. 0.20 mW (within 5 %)Time Delay : EQ Module = 810 ps (LT & GT are faster than EQ)Good !!! We met our specificationConclusionConclusionProblem : Too much Power consumption. Solution : We simplified our logic. We deleted some of inverters.Result : Power goes down.Initial Full SchematicInitial Full SchematicFinal Full SchematicFinal Full SchematicConclusionConclusionBetter result from layout than schematic After all, our design works
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