1Lecture 16: On-Chip Networks• Today: on-chip networks background2Interconnection Networks• Recall: fully connected network, arrays/rings, meshes/tori,trees, butterflies, hypercubes• Consider a k-ary d-cube: a d-dimension array with kelements in each dimension, there are links betweenelements that differ in one dimension by 1 (mod k)• Number of nodes N = kdNumber of switches :Switch degree :Number of links :Pins per node :Avg. routing distance:Diameter :Bisection bandwidth :Switch complexity :N2d + 1Nd2wdd(k-1)/2d(k-1)2wkd-1Should we minimize or maximize dimension?(2d + 1)2(with no wraparound)3Routing• Deterministic routing: given the source and destination,there exists a unique route• Adaptive routing: a switch may alter the route in order todeal with unexpected events (faults, congestion) – morecomplexity in the router vs. potentially better performance• Example of deterministic routing: dimension order routing:send packet along first dimension until destination co-ord(in that dimension) is reached, then next dimension, etc.4Deadlock ExamplePackets of message 1Packets of message 2Packets of message 3Packets of message 44-way switchOutput portsEach message is attempting to make a left turn – it must acquire anoutput port, while still holding on to a series of input and output portsInput ports5Deadlock-Free Proofs• Number edges and show that all routes will traverse edges in increasing (ordecreasing) order – therefore, it will be impossible to have cyclic dependencies• Example: k-ary 2-d array with dimension routing: first route along x-dimension,then along y1 2 32 1 01 2 32 1 01 2 32 1 01 2 32 1 01718191817166Breaking Deadlock II• Consider the eight possible turns in a 2-d array (note thatturns lead to cycles)• By preventing just two turns, cycles can be eliminated• Dimension-order routing disallows four turns• Helps avoid deadlock even in adaptive routingWest-First North-Last Negative-First Can allowdeadlocks7Deadlock Avoidance with VCs• VCs provide another way to number the links such thata route always uses ascending link numbers2 1 01 2 32 1 01 2 32 1 01 2 32 1 0171819181716102 101 100101 102 103117118119118117116202 201 200201 202 203217218219218217216• Alternatively, use West-first routing on the1stplane and cross over to the 2ndplane incase you need to go West again (the 2ndplane uses North-last, for example)8Packets/Flits• A message is broken into multiple packets (each packethas header information that allows the receiver tore-construct the original message)• A packet may itself be broken into flits – flits do notcontain additional headers• Two packets can follow different paths to the destinationFlits are always ordered and follow the same path• Such an architecture allows the use of a large packetsize (low header overhead) and yet allows fine-grainedresource allocation on a per-flit basis9Flow Control• The routing of a message requires allocation of variousresources: the channel (or link), buffers, control state• Bufferless: flits are dropped if there is contention for alink, NACKs are sent back, and the original sender hasto re-transmit the packet• Circuit switching: a request is first sent to reserve thechannels, the request may be held at an intermediaterouter until the channel is available (hence, not trulybufferless), ACKs are sent back, and subsequentpackets/flits are routed with little effort (good for bulktransfers)10Buffered Flow Control• A buffer between two channels decouples the resourceallocation for each channel – buffer storage is not asprecious a resource as the channel (perhaps, not sotrue for on-chip networks)• Packet-buffer flow control: channels and buffers areallocated per packet Store-and-forward Cut-throughTime-Space diagramsH B B B TH B B B TH B B B T0 1 2 3 4 5 6 7 8 9 10 11 12 13 14CycleChannel0123ChannelH B B B TH B B B TH B B B T012311Flit-Buffer Flow Control (Wormhole)• Wormhole Flow Control: just like cut-through, but withbuffers allocated per flit (not channel)• A head flit must acquire three resources at the nextswitch before being forwarded: channel control state (virtual channel, one per input port) one flit buffer one flit of channel bandwidthThe other flits adopt the same virtual channel as the headand only compete for the buffer and physical channel Consumes much less buffer space than cut-throughrouting – does not improve channel utilization as anotherpacket cannot cut in (only one VC per input port)12Virtual Channel Flow Control• Each switch has multiple virtual channels per phys. channel• Each virtual channel keeps track of the output channelassigned to the head, and pointers to buffered packets• A head flit must allocate the same three resources in thenext switch before being forwarded• By having multiple virtual channels per physical channel,two different packets are allowed to utilize the channel andnot waste the resource when one packet is idle13Example• Wormhole:• Virtual channel:ABBA is going from Node-1 to Node-4; B is going from Node-0 to Node-5Node-1Node-0Node-5(blocked, no free VCs/buffers)Node-2 Node-3 Node-4idleidleABANode-1Node-0Node-5(blocked, no free VCs/buffers)Node-2 Node-3 Node-4BATraffic Analogy:B is trying to makea left turn; A is tryingto go straight; thereis no left-only lanewith wormhole, butthere is one with VC14Buffer Management• Credit-based: keep track of the number of free buffers inthe downstream node; the downstream node sends backsignals to increment the count when a buffer is freed;need enough buffers to hide the round-trip latency• On/Off: the upstream node sends back a signal when itsbuffers are close to being full – reduces upstreamsignaling and counters, but can waste buffer space15Router Pipeline• Four typical stages: RC routing computation: the head flit indicates the VC that it belongs to, the VC state is updated, the headers are examined and the next output channel is computed (note: this is done forall the head flits arriving on various input channels) VA virtual-channel allocation: the head flits compete for theavailable virtual channels on their computed output channels SA switch allocation: a flit competes for access to its outputphysical channel ST switch traversal: the flit is transmitted on the output channelA head flit goes through all four stages, the other flits do nothing in thefirst two stages (this