ELE201 Digital Circuit Design Test 2 Oct 22 2012 NAME Instructions This is a closed book closed notes exam Note that the problems do not have equal weight You have 60 minutes to complete the problems There are multiple versions of this test hence your answers might not match those of your friends Grading will be based on a completely correct answer little partial credit will be given Hence use any extra time to check your answers Prob Max score 1 24 2 20 3 20 4 16 5 20 Total 100 Your score 1 24 pts Using Boolean algebra simplify the functions below into simplest SOP form Put your answers on the lines provided a F b F Y ABC Z Y A B Z X Y Z 2 20 pts In class I discussed the priority encoder the truth table for a 4 input version is shown below the output NR is an indicator that none of the input lines is logic 1 Find the combinational logic to implement Z0 in terms of A3 A2 A1 and A0 Put your answer in the simplest form that you can How would you implement NR Put your answers on the lines provided A3 A2 A1 A0 Z1 Z0 NR 0 0 0 0 x x 1 1 x x x 1 1 0 0 1 x x 1 0 0 0 0 1 x 0 1 0 0 0 0 1 0 0 0 Z0 A3 A2 A1 A0 NR A3 A2 A1 A0 3 20 pts The circuit shown is constructed using only 2 input NORs including one being used as an inverter Redesign this circuit so that you use only 2 input NANDs and at most 6 of them Clearly sketch your result in the space provided X Y G Z X Y G Z 4 16 pts While a nice simple implementation the circuit below is subject to hazards Add a NAND gate s to make this circuit hazard free Clearly show the extra gate s directly on the diagram A B C F 5 20 pts Find the minimum SOP or POS expression your choice for 0 2 4 5 6 8 17 21 1 3 7 9 10 11 12 13 15 18 19 22 23 25 27 29 31 To achieve full credit your answer must be in simplest form Put your answer on the line provided F A B C D E