RISC and CISCOverviewHistory of RISC/CISCWhat is CISC?CISC AttributesPowerPoint PresentationSlide 7CISC DisadvantagesWhat is RISC?RISC AttributesPipeliningRISC DisadvantagesCISC versus RISCSummationModern Day AdvancementSlide 16ReferencesRISC and CISCby Eugene ClewlowOverviewHistory of CISC and RISCCISC and RISCPhilosophyAttributes and disadvantagesSummationHistory of RISC/CISC1950s IBM instituted a research program1964 Release of System/360Mid-1970s improved measurement tools demonstrated on CISC1975 801 project initiated at IBM’s Watson Research Center1979 32-bit RISC microprocessor (801) developed led by Joel Birnbaum1984 MIPS developed at Stanford, as well as projects done at Berkeley1988 RISC processors had taken over high-end of the workstation marketEarly 1990s IBM’s POWER (Performance Optimization With Enhanced RISC) architecture introduced w/ the RISC System/6kAIM (Apple, IBM, Motorola) alliance formed, resulting in PowerPCWhat is CISC?CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory. Since the earliest machines were programmed in assembly language and memory was slow and expensive, the CISC philosophy made sense, and was commonly implemented in such large computers as the PDP-11 and the DECsystem 10 and 20 machines. Most common microprocessor designs such as the Intel 80x86 and Motorola 68K series followed the CISC philosophy.But recent changes in software and hardware technology have forced a re-examination of CISC and many modern CISC processors are hybrids, implementing many RISC principles.CISC was developed to make compiler development simpler. It shifts most of the burden of generating machine instructions to the processor. For example, instead of having to make a compiler write long machine instructions to calculate a square-root, a CISC processor would have a built-in ability to do this.CISC AttributesThe design constraints that led to the development of CISC (small amounts of slow memory and fact that most early machines were programmed in assembly language) give CISC instructions sets some common characteristics:A 2-operand format, where instructions have a source and a destination. Register to register, register to memory, and memory to register commands. Multiple addressing modes for memory, including specialized modes for indexing through arrays Variable length instructions where the length often varies according to the addressing mode Instructions which require multiple clock cycles to execute. E.g. Pentium is considered a modern CISC processorMost CISC hardware architectures have several characteristics in common: Complex instruction-decoding logic, driven by the need for a single instruction to support multiple addressing modes. A small number of general purpose registers. This is the direct result of having instructions which can operate directly on memory and the limited amount of chip space not dedicated to instruction decoding, execution, and microcode storage. Several special purpose registers. Many CTSC designs set aside special registers for the stack pointer, interrupt handling, and so on. This can simplify the hardware design somewhat, at the expense of making the instruction set more complex. A 'Condition code" register which is set as a side-effect of most instructions. This register reflects whether the result of the last operation is less than, equal to, or greater than zero and records if certain error conditions occur.At the time of their initial development, CISC machines used available technologies to optimize computer performance.Microprogramniing is as easy as assembly language to implement, and much less expensive than hardwiring a control unit. The ease of microcoding new instructions allowed designers to make CISC machines upwardly compatible: a new computer could run the same programs as earlier computers because the new computer would contain a superset of the instructions of the earlier computers. As each instruction became more capable, fewer instructions could be used to implement a given task. This made more efficient use of the relatively slow main memory. Because microprogram instruction sets can be written to match the constructs of high-level languages, the compiler does not have to be as complicated.CISC DisadvantagesDesigners soon realised that the CISC philosophy had its own problems, including:Earlier generations of a processor family generally were contained as a subset in every new version - so instruction set & chip hardware become more complex with each generation of computers. So that as many instructions as possible could be stored in memory with the least possible wasted space, individual instructions could be of almost any length - this means that different instructions will take different amounts of clock time to execute, slowing down the overall performance of the machine. Many specialized instructions aren't used frequently enough to justify their existence -approximately 20% of the available instructions are used in a typical program. CISC instructions typically set the condition codes as a side effect of the instruction. Not only does setting the condition codes take time, but programmers have to remember to examine the condition code bits before a subsequent instruction changes them.What is RISC?RISC?RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures.HistoryThe first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s. The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all designed with a similar philosophy which has become known as RISC. Certain design features have been characteristic of most RISC processors: one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING pipelining: a techique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions; large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of
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