EE 382MEE 382MVLSI–II: Advanced Circuit DesignNoise AnalysisByron Krauter, IBM The University of Texas at AustinEE 382M Class NotesFoil # 1Outline• General Remarks– Timing Failures vs. Noise FailuresFreq enc Dependent Noise Fail res–Frequency Dependent Noise Failures– Fixing Noise Failures– Noise Analysis• Circuit Sensitivity• Cross Talk Noise •Common Mode NoiseCommon Mode Noise• Power Supply Noise• Leakage CurrentsMiscellaneous Noise•Miscellaneous Noise• Domino Noise Solutions• SummaryThe University of Texas at AustinEE 382M Class NotesFoil # 2Timing & Noise Failures• Timing Failures– Occur when noise impacts a long path delay•Noise is injected on switching nets & circuits•Noise is injected on switching nets & circuits– Hardware functions correctly with a slower clock– Design changes required to achieve highest clock rates, but hi ill t t l fchip will operate at slower frequency • Noise failures– Occur when noise disrupts a quiet logic state• Injected noise arrives at latch when latch is sampled• Some failures resolve with slower clock• Some failures are independent of clock rate• Some failures brought on at slower clock rates• Some failures change with voltage & temperature–Design changes are required to achieve any functionality The University of Texas at AustinEE 382M Class NotesFoil # 3gg q y yTiming Failure ExampleAggressor & victim switch simultaneously (in opposite directions) & victim net is in critical path!clkaggressorvictimclkclkclkcritical pathclkaggressoritiThe University of Texas at AustinEE 382M Class NotesFoil # 4victimNoise Failure Example IVi ti ti ti iti l thb tl tVictim net is not in critical path but late aggressor noise pulse propagates down the victim net & arrives at latch at sampling time.Functional with slower clock because noiseclkFunctional with slower clock because noise arrives after latch is sampled.aggressorvictimclkclkclknoise pulseclkaggressoritiThe University of Texas at AustinEE 382M Class NotesFoil # 5victimNoise Failure Example IIIf OR gate is a dynamic circuit that evaluates when clk=0, then a much slower clock is needed to restore functionality!clkFunctional with slower clock because noise pulse is pinned to a different clock phaseaggressorvictimlkclkclkclknoise pulseclkprecharge evaluateclkaggressoritiThe University of Texas at AustinEE 382M Class NotesFoil # 6victimNoise Failure Example IIIIf dynamic OR gate evaluates and aggressor launches on same clock phase, a slower clock won’t make the hardware function!clkNoise pulse and dynamic OR evaluate locked in same half cycle aggressorvictimlkclkclkclknoise pulseclkprecharge evaluateclkaggressoritiThe University of Texas at AustinEE 382M Class NotesFoil # 7victimFrequency Dependent Noise FailuresAggressorNetc1c2c1c2NetVictimc1c2c2c1VictimNetc1c2The University of Texas at AustinEE 382M Class NotesFoil # 8Frequency Dependent Noise FailuresAll latches master-slaveat a single frequencyAggressor Windowc1c2at a single frequencyc2Victim Windowc2ct doThe University of Texas at AustinEE 382M Class NotesFoil # 9Frequency Dependent Noise FailuresAll latches master-slaveat a single frequencyAggressor Windowc1c2at a single frequencyc2Victim Windowc2ct doThe University of Texas at AustinEE 382M Class NotesFoil # 10Frequency Dependent Noise FailuresAll latches master-slaveat a single frequencyAggressor Windowc1c2at a single frequencyc2Victim Windowc2ct doThe University of Texas at AustinEE 382M Class NotesFoil # 11Frequency Dependent Noise FailuresAll latches master-slaveat a single frequencyAggressor Windowc1c2at a single frequencyc2Victim Windowc2ct doThe University of Texas at AustinEE 382M Class NotesFoil # 12Fixing Noise Failures• Reduce noise level below circuit noise sensitivity– Changes might include:•Wiring changes•Wiring changes• Power distribution changes• Power gating settingsAggressor circuit or keeper circuit changes•Aggressor circuit or keeper circuit changes• Clock or timing changes– Invariably costs additional design resource• Increase circuit noise sensitivity above noise level– Involves some type of circuit change• Dynamic to static• Different p/n ratio• Hysteresis feedback loops• Larger keeper devices on domino gatesThe University of Texas at AustinEE 382M Class NotesFoil # 13– Invariably trades speed for increased noise immunityNoise AnalysisNoise is typically analyzed as individual driver-receiver pairs.Accounts for both noise generation and noise reception!Accounts for both noise generation and noise reception!Driver TypeWire TypeReceiver TypeTypeTypeTypePropagated NoiseInterconnect NoiseTotal Noise Propagated NoiseA budget for total noise prevents failure at this receiver.A budget for propagated noise prevents failure at the next receiverThe University of Texas at AustinEE 382M Class NotesFoil # 14A budget for propagated noise prevents failure at the next receiver.Ci it S iti itCircuit SensitivityThe University of Texas at AustinEE 382M Class NotesFoil # 15Circuit Noise MarginsVout (V) Ideal transfer curveSmall Signal Unity Gain PointsVouhA gate’s noise margins are formally defined by the unity gain points of its transfer curve.PointsVoulUNM(h) = Vouh - ViuhUNM(l) = Viul - VoulVin (V) VoulViul ViuhThe unity gain noise margins are the maximum amounts of DC noise which can be added to every node.DC measurements of noise and noise margins tend to be overly conservativeThe University of Texas at AustinEE 382M Class NotesFoil # 16DC measurements of noise and noise margins tend to be overly conservative.Adjust P/N Ratio of ReceiverVin Vout3.5Vo t1VinVout2.3Vout (V) VinVout11.5Vin (V) Vin Vout1Con: May slow critical transitionChanging the P/N ratio of a receiver can greatly affect its sensitivity to noise.The University of Texas at AustinEE 382M Class NotesFoil # 17Circuit Noise MarginsAC Noise Immunityii iiipositive noisevddnegative noisevddgnd gndpulseheightunsafepulseheightsafeunsafepulse widthheightsafepulse widthheightThe University of Texas at AustinEE 382M Class NotesFoil # 18pulse widthpulse widthLower Fan-In of ReceiverCon:Can increase delayLow fan-in gates after noisy nodesCon:Can increase delayLow fan-in gates after noisy nodes will attenuate noise before sensitive receivers are reached.The University of Texas at AustinEE 382M Class NotesFoil # 19Reduce Size of ReceiverSigASigB157.5SigASigB155.4SigBSigB102.5Si BSigB101.8SigASigBVSigASigBVgVssATimeCon:Increases