Carnegie Mellon UniversityCARNEGIE INSTITUTE OF TECHNOLOGYTHESISSUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTSFOR THE DEGREE OF MASTER OF SCIENCEPOWER SUPPLY NOISE REDUCTION USINGACTIVE RESISTORSGOK(~E KESKiNACCEPTED BY THE DEPARTMENT OFELECTRICAL AND COMPUTER ENGINEERINGREVIEWED BYDATEDATEAcknowledgementsI am thankful to my thesis advisor, Larry Pileggi, for providing me great guidance during the courseof this project. His full support and encouragement have made this work possible. He has been aconstant inspiration for me during the difficult times of the project.I would also like to thank Ken Mai and Patrick Yue for their help during the fabrication of the testchip and excellent advice on the problems I encountered. I am particularly grateful to Xin Li for hisextremely valuable contributions starting from the first day of this project. I have learnt a lot fromhim, including identifying problems and finding ways to solve them. Contributions of Marija Ilic andAleksandar Veselinovic during the early exploration stages of this project have also been veryvaluable. I owe many thanks to Jaejin Park, Kihwa Choi and Hasan Akyol, who have helped me invarious stages of the project.I have to acknowledge the great moral support of my friends at Carnegie Mellon. Umut Arslan, HasanAkyol, Rohan Batra, Ahmet Gtirkan l~epni, Volkan Ediz, Thiago Hersan, Wessam Hassanein,Koushik Niyogi, Jonathan Proesel and Aleksandar Veselinovic have made my stay enjoyable duringthis time.Most importantly, I owe great thanks to my family. Without them, I would not be here today. I amgrateful to my grandmother, mother, father, sister and brother-in-law for being the meaning of mylife.2Table of contentsAbstract ..................................................................................................................................... 41. Introduction .......................................................................................................................... 52. Background ..........................................................................................................................82.1 Decoupling Capacitance ............................................................................................................. 82.2 Resistive Damping .................................................................................................................... 112.3 Analysis ...................................................................................................................................... 123. Active Resistors for Noise Reduction ................................................................................163.1 Concept ...................................................................................................................................... 163.2 Simulation Setup and Results ..................................................................................................213.3 Testing ....................................................................................................................................... 274. Conclusions ........................................................................................................................ 305. References .......................................................................................................................... 31AbstractWith the reduction of supply voltages in today’s integrated circuits, maintaining the power supply voltageintegrity within the required range of operation has become a critical design problem. Furthermore, if clockgating techniques are used to reduce the overall power consumption, a large portion of the circuits can beturned on or off simultaneously, thereby introducing substantial transient switching noise on the power grid.The traditional solution for this problem is to include both on- and off-chip decoupling capacitors to reducetransient peaks; however, there is a point of diminishing returns for adding more on-chip capacitance interms of area and leakage power in modern technologies. In this thesis, we propose the use of activeresistors for damping the typically underdamped power grid distribution network to reduce both theamplitude and the duration of transient oscillations in the power and ground rails. Initial simulation resultsin 130nm CMOS technology demonstrate more than a 40% reduction in oscillation amplitude and asignificant reduction of the oscillation settling time over a conventional design with the same amount ofdecoupling. A test chip has been built in the same technology and it is currently under test at CarnegieMellon.41. IntroductionContinual scaling in integrated circuit technology has made it possible to achieve higher transistor densityin a given die area. Even with the lowering of the power supply voltage for newer process nodes, themaximum power consumption of high-end microprocessors has been projected to continue to increase forthe foreseeable future (Fig. 1) [1].Power Consumption Projection for High PerformanceMicroprocessors, ITRS 2004 Update22020018016o14012olOO2005 2006 2007 2008 2009PowerCurrentj180~40Figure I. Power consumption trend in microprocessors [1].Many processors today include clock gating schemes that turn off unused portions of the chip to reducepower consumption [2]. However, when the idle regions are switched back on as required under normaloperation, the current demand increases rapidly in a short period of time (at most a few nanoseconds).Ultimately, this current has to be supplied by the main board to the chip through the inductive bondingconnections between the chip, package, and the board. Since the voltage drop across an inductor isproportional to the rate of change of current through it, the voltage on the chip level decreases below the5nominal value during switching. This type of noise is commonly called Ldi/dt noise, or simultaneousswitching noise. An analogous situation occurs when large active blocks are turned off when they are notneeded. (Figure 2)dV=L.dl/dtDecapVdd IChip_.LFigure 2. Simple model describing L.di/dt noise.CurrentDemandThere are two