Intel Corporation – Intel® IXP2400 Network Processor - 2nd Generation Intel® NPU Many trends are driving the need for intelligence and flexibility in network systems. Intel has developed next generation network processors optimized for applications from the customer premises to the core of the network. Intel® IXP2400 network processor delivers a new level of intelligence and performance for access and edge applications, enabling the realization of Quality-of-Service (QoS), enforcement of Service Level Agreements (SLAs), and traffic engineering at OC-48/2.5Gbps and 4Gbps data rates. These capabilities will allow OEMs and Service Providers to offer differentiated and tiered services to their customers while efficiently managing their network resources and bandwidth. 1. Target Applications Increasingly, packet processing requirements vary significantly by market segment. For example, access networking equipment must support multiple interfaces and protocols. At the same time this equipment needs to meet tight power and real estate requirements dictated by space constraints in wiring closets. Equipment deployed at the edge of the network must support rapid provisioning of services, scalable performance to provide support for emerging services at wire rate and smooth migration to emerging standards. For all applications, minimizing costs and maximizing time-in-market are also critical concerns. The IXP2400 has the ideal set of features to support these access and edge requirements at line rates up to OC-48/2.5 Gbps and 4x1GbE. The IXP2400 performance and flexibility make it desirable for a wide variety of high performance applications such as multi-service switches, DSLAMs (DSL access multiplexers), CMTS (cable modem termination system) equipment, 2.5G and 3G wireless infrastructure and Layer 4-7 switches including content-based load balancers, and firewalls. The programmability of the IXP2400 also makes it well suited for VoIP Gateways, multi-service access platforms, edge routers, remote access concentrators and VPN Gateways. Usage models for IXP2400 Network Processor in the target markets listed above are as follows: • Aggregation, QoS, ATM SAR functions, traffic shaping, policing, forwarding and protocol conversion in DSLAM equipment • Aggregation, QoS, forwarding and protocol conversion in CMTS equipment • ATM SAR, encryption, forwarding in base station controller/radio network controllers (BSC/RNC) • General Packet Radio Services (GPRS) Tunneling Protocol tunneling and Ipv6 in wireless infrastructure • ATM SAR, Multi-protocol Label Switching (MPLS), QoS, traffic shaping, policing, protocol conversion and aggregation for multi-service switches • Content-aware load balancing, forwarding and policing for edge server offloadFigure 1 - IXP2400 based line card solution Figure 1 shows the system configuration for a full duplex OC-48 line card implemented using the IXP2400 network processor. Figure 2 shows a single chip IXP2400 based line card supporting 4Gb/s data rate. Figure 2 – Single IXP2400 based solution 2. Hardware Architecture This section provides a brief overview of the Sausalito external interfaces and the internal hardware architecture. IXF6048FramerIXP2400Ingress ProcessorIXP2400Egress ProcessorSwitchFabricGasketSSDDRRAAMMQQDDRRSSDDRRAAMMQQDDRRDDR SDRAM Packet MemoryQDR SRAM Queues & TablesDDR SDRAM Packet MemoryQDR SRAM Queues & Tables1x OC-48 or4x OC-12OC-48 OC48OC48OC48QQDDRRQQDDRRTTCCAAMMClassificationAcceleratorTTCCAAMMClassificationAcceleratorHost CPU(IOP or iA)IXF6048FramerIXP2400Ingress ProcessorIXP2400Egress ProcessorSwitchFabricGasketSSDDRRAAMMQQDDRRSSDDRRAAMMQQDDRRDDR SDRAM Packet MemoryQDR SRAM Queues & TablesDDR SDRAM Packet MemoryQDR SRAM Queues & Tables1x OC-48 or4x OC-12OC-48 OC48OC48OC48QQDDRRQQDDRRTTCCAAMMClassificationAcceleratorTTCCAAMMClassificationAcceleratorHost CPU(IOP or iA)Each is 10/100/GEGMII or RGMIIEach is 1Gbs 8-bit x 125MHz SPI-3PCI 64/66IXP2400Network ProcessorDDRRAAMMQQDDRRQQDDRRDDR SDRAMPacket MemoryQDR SRAM Queues & TablesControl PlaneProcessorPIIIOptional Co-processors eg. TCAMQuad GE MACTo SPI3 bridge(Vallejo)Each is 10/100/GEGMII or RGMIIEach is 10/100/GEGMII or RGMIIEach is 1Gbs 8-bit x 125MHz SPI-3PCI 64/66IXP2400Network ProcessorDDRRAAMMQQDDRRQQDDRRDDR SDRAMPacket MemoryQDR SRAM Queues & TablesControl PlaneProcessorPIIIOptional Co-processors eg. TCAMQuad GE MACTo SPI3 bridge(Vallejo)Each is 10/100/GEGMII or RGMIIFigure 3 shows the external interfaces supported by the IXP2400 network processor. Figure 3 – IXP2400 External Interfaces • 32b RX and TX interface that supports Utopia 1,2,3, POS-PHY-L2, SPI3 and CSIX protocols. This interface can be independently configured to be 1x32, 2x16, 4x8 or 2x8+1x16 and can be clocked at 25MHz-125MHz. At 125 MHz, the interface provides a peak bandwidth of 4Gb/s in and out of the chip. • 4b/8b CSIX flow control bus that is used to communicate fabric flow control information to the egress IXP2400. At 125 MHz, this interface provides up to 1Gb/s of peak bandwidth for flow control messages. • 1 channel of DDR DRAM running at 150/300MHz, providing 19.2Gb/s of peak DRAM bandwidth. The channel can support up to 2 GB of DRAM. • 2 channels of QDR SRAM running at 200/400 MHz, providing 12.8Gb/s of read bandwidth and 12.8Gb/s of write bandwidth. Up to 32MB of SRAM can be populated on the 2 channels. • 64b PCI running at 66 MHz, providing a peak bandwidth of 4.2Gb/s Figure 4 shows the internal architecture of the IXP2400. Figure 4 - IXP2400 Internal Architecture. Utopia 1,2,3SPI – 3 (POS-PL3)CSIXUtopia 1/2/3 orPOS-PL2/3InterfacePCI 64-bit / 66 MHzIXP2400(Ingress)HostCPU(Optional)ATM / POS PHYor Ethernet MACFlashMicro-EngineClusterSlow PortSwitch Fabric Port InterfaceSausalito(Egress)Flow Control BusDDR DRAM2 GByteQDR SRAM20 Gbps32 M ByteUtopia 1,2,3SPI – 3 (POS-PL3)CSIXUtopia 1/2/3 orPOS-PL2/3InterfacePCI 64-bit / 66 MHzIXP2400(Ingress)HostCPU(Optional)ATM / POS PHYor Ethernet MACFlashMicro-EngineClusterSlow PortSwitch Fabric Port InterfaceSausalito(Egress)Flow Control BusDDR DRAM2 GByteQDR SRAM20 Gbps32 M ByteMEv26MEv27MEv25MEv28XScaleCore32K IC32K DCRbuf64 @ 128BTbuf64 @ 128BHash64/48/128Scratch16KBQDRSRAM1QDRSRAM2DDRAMGASKETPCI(64b)66 MHz32b32b32b32b1818181818181818727264b64bSPI3orCSIXStripe/byte alignE/D Q E/D QMEv22MEv23MEv21MEv24CSRs -Fast_wr -UART-Timers -GPIO-BootROM/Slow PortMEv26MEv27MEv25MEv28XScaleCore32K IC32K