264 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 11, NO. 3, JUNE 2002Effect of Process Parameters on the SurfaceMorphology and Mechanical Performance of SiliconStructures After Deep Reactive Ion Etching (DRIE)Kuo-Shen Chen, Arturo A. Ayón, Senior Member, IEEE, Xin Zhang, Member, IEEE, and S. Mark SpearingAbstract—The ability to predict and control the influence ofprocess parameters during silicon etching is vital for the successof most MEMS devices. In the case of deep reactive ion etching(DRIE) of silicon substrates, experimental results indicate thatetch performance as well as surface morphology and post-etchmechanical behavior have a strong dependence on processingparameters. In order to understand the influence of these param-eters, a set of experiments was designed and performed to fullycharacterize the sensitivity of surface morphology and mechan-ical behavior of silicon samples produced with different DRIEoperating conditions. The designed experiment involved a matrixof 55 silicon wafers with radiused hub flexure (RHF) specimenswhich were etched 10 min under varying DRIE processing condi-tions. Data collected by interferometry, atomic force microscopy(AFM), profilometry, and scanning electron microscopy (SEM),was used to determine the response of etching performance tooperating conditions. The data collected for fracture strength wasanalyzed and modeled by finite element computation. The datawas then fitted to response surfaces to model the dependenceof response variables on dry processing conditions. The resultsshowed that the achievable anisotropy, etching uniformity, filletradii, and surface roughness had a strong dependence on chamberpressure, applied coil and electrode power, and reactant gasesflow rate. The observed post-etching mechanical behavior forspecimens with high surface roughness always indicated lowfracture strength. For specimens with better surface quality, therewas a wider distribution in sample strength. This suggests thatthere are more controlling factors influencing the mechanicalbehavior of specimens. Nevertheless, it showed that in order toachieve high strength, fine surface quality is a necessary requisite.The mapping of the dependence of response variables on dryprocessing conditions produced by this systematic approachprovides additional insight into the plasma phenomena involvedand supplies a practical set of tools to locate and optimize robustoperating conditions. [684]Index Terms—Deep reactive ion etching (DRIE), fracturestrength, MEMS, plasma etching, silicon, surface morphology.Manuscript received April 23, 2001; revised September 26, 2001. This workwas supported by the U.S. Army Research Office (ARO) and DARPA underContract DAAH04-95-1-0093. This paper was presented in part at the MRSFall Meeting, Boston, MA, 1998. Subject Editor H. Fujita.K.-S. Chen is with the Department of Mechanical Engineering,National Cheng-Kung University, Tainan, Taiwan 70101 (e-mail:[email protected]).A. A. Ayón is with Sony Semiconductor, San Antonio, TX 78245 USA.X. Zhang was with the Microsystems Technology Laboratories, Departmentof Electrical Engineering and Computer Science, Massachusetts Institute ofTechnology (MIT), Cambridge, MA 02139 USA. She is now with the Depart-ment of Manufacturing Engineering, Boston University, Brookline, MA 02446USA.S. M. Spearing is with the Department of Aeronautics and Astronautics,Massachusetts Institute of Technology (MIT), Cambridge, MA 02139 USA.Publisher Item Identifier S 1057-7157(02)04976-4.I. INTRODUCTIONDEEP reactive ion etching (DRIE) of silicon enables themicrofabrication of high-aspect ratio structures (HARS),which, in turn, permit the fabrication of devices able to spanfrom 100 to 1000m. HARS also allow the fabrication of struc-tures that are compliant in the plane of the wafer but rigid in thedirection normal to its surface [1]. Furthermore, HARS in com-bination with aligned silicon wafer bonding, make possible therealization of novel and promising applications, such as PowerMEMS [2]. However, most applications place stringent require-ment on HARS in terms of high silicon etching rate, good se-lectivity to masking material, profile control and compatibilitywith other processes [3].STS licensed the DRIE technique patented by Robert BoschGmbh [4]. It relies on the deposition of inhibiting films toobtain anisotropic profiles. This approach utilizes an etchingcycle flowing only SF[see Fig. 1, steps (ii) and (iv)] and thenswitches to a sidewall passivating cycle using only CF [seeFig. 1, step (iii) ]. During the subsequent etching cycle, the pas-sivating film is preferentially removed from the bottom of thetrenches due to ion bombardment, while preventing the etchingof the sidewalls. The alternating of etching and passivatingcycles forms scallops on the sidewalls of etched features. Thepeak to valley height of those scallops, being a function ofoperating conditions, can be controlled to some extent. Becauseof the alternating between etching and passivating cycles, theterm time multiplexed deep etching (TMDE) describes moreclosely this technique and it will be used in all subsequentdescriptions. The success of Bosch’s TMDE scheme relies onthe deposition of the inhibiting films to prevent the etching ofthe sidewalls.The Bosch approach uses the high etching rate of flu-orine-rich plasmas to etch HARS. Some recently reportedapplications are already exploiting this last alternative [1],[5], [6]. Furthermore, by suppressing the time multiplexing,the equipment can be run with continuous flows of SForCF . With SF it is possible to achieve isotropic profiles.With CF it is possible to deposit teflon-like films that havebeen described elsewhere [7]. The large parameter space for aDRIE etching tool has proven to be versatile enough to allowprescribing the profile of etched features, uniformity across thewafer, selectivity to masking material, silicon etching rate aswell as surface roughness.As mentioned before, power MEMS is one important appli-cation of HARS. The favorable scaling of the strength of brittle1057-7157/02$17.00 © 2002 IEEECHEN et al.: EFFECT OF PROCESS PARAMETERS ON SILICON STRUCTURES AFTER DRIE 265Fig. 1. TMDE scheme. (i) Patterned masking material on a silicon wafer.(ii) Silicon etching cycle. (iii) Fluorocarbon film deposition. (iv) Siliconetching cycle.materials offers the potential to create MEMS capable of oper-ating at high power densities. Such devices could be used forelectrical power