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PEPPERDINE COSC 425 - Computer Systems

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Computer Systems, Fourth Edition! J. Stanley WarfordInstructionSpecifierAddressingModesStatusBitsMnemonic Instruction0000 00000000 00010000 00100000 00110000 010a0000 011a0000 100a0000 101a0000 110a0000 111a0001 000a0001 001a0001 010a0001 011a0001 100r0001 101r0001 110r0001 111r0010 000r0010 001r0010 01nn0010 1aaa0011 0aaa0011 1aaa0100 0aaa0100 1aaa0101 0aaaUUUUi, xi, xi, xi, xi, xi, xi, xi, xi, xi, xUUUUUUUid, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfd, n, sfd, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfSTOPRETTRMOVSPAMOVFLGABRBRLEBRLTBREQBRNEBRGEBRGTBRVBRCCALLNOTrNEGrASLrASRrROLrRORrNOPnNOPDECIDECOSTROCHARICHAROStop executionReturn from trapMove SP to AMove NZVC flags to ABranch unconditionalBranch if less than or equal toBranch if less thanBranch if equal toBranch if not equal toBranch if greater than or equal to Branch if greater thanBranch if VBranch if CCall subroutineBitwise invert rNegate rArithmetic shift left rArithmetic shift right rRotate left rRotate right rUnary no operation trapNonunary no operation trapDecimal input trapDecimal output trapString output trapCharacter inputCharacter outputNZNZVNZVCNZCCCNZV0101 1nnn0110 0aaa0110 1aaa0111 raaa1000 raaa1001 raaa1010 raaa1011 raaa1100 raaa1101 raaa1110 raaa1111 raaaUi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfi, d, n, s, sf, x, sx, sxfd, n, s, sf, x, sx, sxfd, n, s, sf, x, sx, sxfRETnADDSPSUBSPADDrSUBrANDrORrCPrLDrLDBYTErSTrSTBYTErReturn from call with n local bytesAdd to stack pointer (SP)Subtract from stack pointer (SP)Add to rSubtract from rBitwise AND to rBitwise OR to rCompare rLoad r from memoryLoad byte from memoryStore r to memoryStore byte r to memory NZVCNZVCNZVCNZVCNZNZNZVCNZNZComputer Systems, Fourth Edition! J. Stanley Warfordaaa Addressing mode000001010011100101110111ImmediateDirectIndirectStack-relativeStack-relative deferredIndexedStack-indexedStack-indexed deferreda Addressing mode01ImmediateIndexed(a) The addressing-aaa field.(b) The addressing-a field. (c) The register-r field.r Register01Accumulator, AIndex register, X6.4 Indexed Addressing and Arrays 285aaaAddressing Mode Letters000001010011100101110111ImmediateDirectIndirectStack-relativeStack-relative deferredIndexedStack-indexedStack-indexed deferredidnssfxsxsxfOperandOprndSpecMem [OprndSpec]Mem [Mem [OprndSpec]]Mem [SP + OprndSpec]Mem [Mem [SP + OprndSpec]]Mem [OprndSpec + X]Mem [SP + OprndSpec + X]Mem [ Mem [SP + OprndSpec] + X]Figure 6.33The Pep/8 addressing modes.column labeled Letters shows the assembly language designation for the addressingmode at level Asmb5. The column labeled Operand shows how the CPU determinesthe operand from the operand specifier (OprndSpec).Translating Global ArraysThe C++ program in Figure 6.34 is the same as the one in Figure 2.15 (page 46),except that the variables are global instead of local. It shows a program at levelHOL6 that declares a global array of four integers named vector and a global inte-ger named j. The main program inputs four integers into the array with a for loopand outputs them in reverse order together with their indexes.High-Order Language#include <iostream>using namespace std;int vector[4];int j;int main () {for (j = 0; j < 4; j++) {cin >> vector[j];}for (j = 3; j >= 0; j--) {cout << j << ' ' << vector[j] << endl;}return 0;}Figure 6.34A global array.71447_CH06_Chapter06.qxd 1/27/09 7:04 PM Page 285FC9BFC4FFC57FBCFFBCFFFF8FC4FFFFAFC57FFFCFC9BFFFESystemstackUser stackHeapI/O bufferLoaderTraphandler0000ApplicationprogramMemComputer Systems, Fourth Edition! J. Stanley WarfordA8 Appendix Pep/8 ArchitectureADDrSUBrANDrORrCPrLDrLDBYTErSTrSTBYTErTrapMnemonic Register transfer language specificationFigure A.11(Continued)r ← r + Oprnd ; N ← r < 0 , Z ← r = 0 , V ← {overflow} , C ← {carry}r ← r – Oprnd ; N ← r < 0 , Z ← r = 0 , V ← {overflow} , C ← {carry}r ← r ∧ Oprnd ; N ← r < 0 , Z ← r = 0r ← r ∨ Oprnd ; N ← r < 0 , Z ← r = 0T ← r – Oprnd ; N ←T < 0, Z ← T = 0 , V ← { overflow} , C ← {carry}r ← Oprnd ; N ← r < 0 , Z ← r = 0r !8..15" ← byte Oprnd ; N ← r < 0 , Z ← r = 0Oprnd ← rbyte Oprnd ← r !8..15"T ← Mem[FFFA] ; Mem[T – 1] ← IR ; Mem[T – 3] ← SP ;Mem[T – 5] ← PC ; Mem[T – 7] ← X ; Mem[T – 9] ← A ;Mem[T – 10]!4..7" ← NZVC ; SP ← T – 10 ; PC ← Mem[FFFE]SP := Mem [FFFA]PC := Mem [FFFC]SP := Mem [FFF8]PC := 0000Figure A.13The execute option.Figure A.12The load option.32397_App_A1_A08 1/14/09 7:30 PM Page A8Appendix Pep/8 Architecture A7Stop executionNZVC ← Mem[SP] !4..7" ; A ← Mem[SP + 1] ; X ← Mem[SP + 3] ; PC ← Mem[SP + 5] ; SP ← Mem[SP + 7]A ← SPA !0..11" ← 0 , A!12..15" ← NZVCPC ← OprndN ! 1 ∨ Z ! 1 ⇒ PC ← OprndN ! 1 ⇒ PC ← OprndZ ! 1 ⇒ PC ← OprndZ ! 0 ⇒ PC ← OprndN ! 0 ⇒ PC ← OprndN ! 0 ∧ Z ! 0 ⇒ PC ← OprndV ! 1 ⇒ PC ← OprndC ! 1 ⇒ PC ← OprndSP ← SP " 2 ; Mem[SP]← PC ; PC ← Oprndr ← ¬r ; N ← r < 0 , Z ← r ! 0r ← "r ; N ← r < 0 , Z ← r ! 0 , V ← {overflow}C ← r !0" , r !0..14" ← r !1..15" , r !15" ← 0 ; N ← r < 0 , Z ← r ! 0 , V ← {overflow}C ← r !15" , r !1..15" ← r !0..14" ; N ← r < 0 , Z ← r ! 0C ← r !0" , r !0..14" ← r !1..15" , r !15" ← CC ← r !15" , r !1..15" ← r !0..14" , r !0" ← CTrap: Unary no operationTrap: Nonunary no operationTrap: Oprnd ← {decimal input}Trap: {decimal output} ← OprndTrap: {string output} ← Oprndbyte Oprnd ← {character input}{character output} ← byte OprndSP ← SP + n ; PC ← Mem[SP] ; SP ← SP + 2SP ← SP + Oprnd ; N ← SP < 0 , Z ← SP = 0 , V ← {overflow} , C ← {carry}SP ← SP – Oprnd ; N ← SP < 0 , Z ← SP = 0 , V ← {overflow} , C ← {carry}Mnemonic Register transfer language specificationSTOPRETTRMOVSPAMOVFLAGABRBRLEBRLTBREQBRNEBRGEBRGTBRVBRCCALLNOTrNEGrASLrASRrROLrRORrNOPnNOPDECIDECOSTROCHARICHARORETnADDSPSUBSPFigure A.11RTL specification of Pep/8instructions.32397_App_A1_A08 1/14/09 7:30 PM Page A7Computer Systems, Fourth Edition! J. Stanley WarfordCharNULSOHSTXETXEOTENQ ACKBELBSHTLFVTFFCRSOSIDLEDC1DC2DC3DC4NAKSYNETBCANEMSUBESCFSGSRSUSBin000 0000000 0001000 0010000 0011000 0100000 0101000 0110000 0111000 1000000 1001000 1010000 1011000 1100000 1101000 1110000 1111001 0000001 0001001 0010001 0011001 0100001 0101001 0110001 0111001


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