4. Digital LogicIntegrated CircuitsGND – ground4. Digital Logicinverter -- NOT gateNAND gate© C. Robert Putnam Page 31 1/14/2019VinVoutbipolartransistor+VccresistorVin < value gate is closed, +Vcc flows to groundVinVout+VccVin >= value gate is open, path to ground is broken,+Vcc flows to Vout+VccVoutV1inV2in+Vcc : constant voltageNAND gatelogical gates- NOT- NAND- NOR- AND- ORmanufacturing technologies- bipolaro TTL – transistor-transistor logico ECL -- emitter-coupled logic- MOS – metal oxide semiconductor (PMOS, NMOS, CMOS, etc)o slower than bipolaro require less space than bipolaro require less power than bipolaro greater packing efficiency over bipolarA B C M0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1© C. Robert Putnam Page 32 1/14/2019+VccVoutV1inV2inboolean algebra – switching algebraboolean function with n variables truth table with 2n rows, n+1 columns complete delineation of functionM = A¯BC + AB¯C + ABC¯ + ABCboolean function circuit design1. use boolean function to create the truth table2. create inverters to generate the complement of each input3. create AND gate for each term with 1 in result column4. connect AND gates to appropriate inputs5. connect output of all AND gates to an OR gatecomplete gates- NAND- NORcircuit equivalence -- dual Boolean functions0 1AND ORpositive logic - zero volts logical zero- 3.3 volts | 5 volts logical onenegative logic- 3.3 volts | 5 volts logical zero- zero volts logical oneIntegrated Circuits Dual Inline Packages – DIP -- chips- SSI 1 – 10 gates- MSI 10 – 100 gates- LSI 100 – 100,000 gates- VLSI > 100,000 gatesVCC – powerGND – groundgate delay – propagation time© C. Robert Putnam Page 33 1/14/2019used in general design literatureCombinatorial Circuitscurrent input values output values (uniquely determined)control line value setselects exactly one data input line for outputtruth table implementationresult value 1 input data line VCCresult value 0 input data line GNDparallel-to-serial convertern == 3place byte on the 8 input linesstep control lines sequentially from 000 to 111© C. Robert Putnam Page 34 1/14/2019multiplexer2n data input linesone data output linen control input linesdemultiplexerone data input line2n data output linesn control input linesdecoderone n-bit data input numberselect exactly one of the 2n data output linescomparatortwo input wordsidentical output 1different output 0Programmable Logic Arrays – PLAfield programmable by userfactory fabrication to user specificationshigh voltage burns
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