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Berkeley PHYSICS 111 - Lab 4 JFET Circuits I

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Revision 2007 Page 1 of 22 ©2007 Copyright by the Regents of the University of California. All rights reserved University of California at Berkeley Physics 111 Laboratory Basic Semiconductor Circuits (BSC) Lab 4 JFET Circuits I ©2007 Copyright by the Regents of the University of California. All rights reserved. References: Sedra & Smith Chapter 5 Hayes & Horowitz Chapter 3 Horowitz & Hill Chapter 3 In this lab you will explore basic JFET characteristics, circuits and applications. You will build a JFET switch, memory cell, current source, and source follower. Before coming to class complete this list of tasks: • Completely read the Lab Write-up • Answer the pre-lab questions utilizing the references and the write-up • Perform any circuit calculations or anything that can be done outside of lab. • Plan out how to perform Lab tasks. Pre-lab questions: 1. What is the maximum allowed gate current? What happens if this current is exceeded? 2. In a few sentences, explain how a self-biased current source works. 3. Explain how to use load line analysis as outlined in the background materials. Why does it give the equilibrium current for the self-biased current source? 4. Why does increasing a follower’s source resistor decrease its JFET’s transconductance? (Refer to the discussion just before4.17.) Why does this degrade the performance of a source follower? Do not forward bias the JFET gates. Forward gate currents larger than 50mA will burn out the JFETs!Physics 111 BSC Laboratory Lab 4 JFET Circuits I Background JFET Transistors There are two principle types of transistors: bipolar transistors (BJTs), and field-effect transistors (FETs). The physical mechanisms underlying the operation of these two types of transistors are quite different. We will limit our study to FETs because their physical mechanism is simpler. FETs are subdivided into two major classes: junction field-effect transistors (JFETs) and metal-oxide-semiconductor field-effect transistors (MOSFETs).1 Since MOSFETs2 burn out very easily, we will concentrate on JFETs. JFETs, particularly discrete JFETs, are less common than bipolar or MOSFET transistors, but will give us a good picture of how transistor circuits work. Transistors are amplifiers; a small signal is used to control a larger sig-nal. Typical transistors have three leads; in the case of a JFET, a voltage on one lead (called the gate) is used to control a current between two other leads (called the source and the drain). Of course, the gate voltage needs to be referenced to some other potential. By convention, it is ref-erenced to the source. JFETs are drawn as shown to the right where the gate, drain and source (G, D, S, respectively) labels are normally omit-ted. Transistor voltages and currents are labeled by subscripts referring to the appropriate lead. Thus VGS refers to the voltage between the gate and the source, ID is the current into the drain, and IS is the current out of the source. Under normal operating conditions, no current flows into the gate. Consequently ID = IS. GSDIVDGSISVDS JFET Characteristics and the Transconductance Model Under normal operating conditions, the JFET gate must be negatively biased relative to the source. The JFET may burn out if the gate is positively bi-ased. The JFET gate and source–drain form a pn junction diode; a very simple model of the JFET is shown at right, in which the resistance depends on the gate bias. Since the gate is negatively biased relative to the source, the diode is reverse biased. Consequently the gate current will be negligible, thereby proving that ID = IS. Note that checking a JFET’s internal diode with a DMM is a good way of determining if the JFET is working; the diode is usually blown out in broken JFETs. GDS A more useful JFET model replaces the variable resistor with a variable current source whose current depends on the gate volt-age VGS and the drain-source voltage, VDS. Revision 2007 Page 2 of 22 ©2007 Copyright by the Regents of the University of California. All rights reserved The drain-source current is largest when the gate-source voltage VGS is zero, typically about 50mA. As VGS is made negative, the current decreases. When the gate-source voltage VGS reaches a critical value called the gate-source pinch off voltage VS, the drain current ID is cutoff entirely; no current flows. The value of VS depends on the particular type of JFET (and even varies sub-stantially between JFETs of the same type), but is typically around –4V. As VGS is raised towards 0V, current ID starts to flow. A typical plot of the current vs. gate voltage is shown in Fig. 1 below. Simple models of JFET performance predict that the curve will be parabolic, but actual devices may differ substantially from this prediction. GSDVGSI (V ,V )GSDSD 1 Actually, each type of FET is further subdivided into n and p-channel FETs, and, for MOSFETs, enhancement and depletion MOSFETs, but lets not get into all that! 2 Static electricity easily destroys MOSFETs. They can be burnt out simply by walking across a room on a dry day while carrying them in your hand. Once soldered into a circuit, however, MOSFETs are quite robust.Physics 111 BSC Laboratory Lab 4 JFET Circuits I 3 -2 -1 0V IGDSmA (V) 204060VP Figure 1: JFET Transfer Characteristic The source current also depends on the drain source voltage. Two regimes are apparent in this graph: a low voltage “linear” regime where the output current is linearly related to VDS, and a “saturation” region where the current is weakly dependent on VDS. Small-Signal Transconductance Model For small variations in VGS, the JFET model can be linearized: GSDvGS-g vmGS The input voltage3 and the output current are related by the equation . The proportionality gm is called the “transconductance”; “trans” because the gate voltage is trans-ferred to the source current, and “conductance” because gm has units of conductivity. As in any small-signal model, all constant voltage offsets and constant currents are ignored. In particular, the VGS bias required to obtain the desired ID is ignored; is centered around zero. GSvDiGSmDvgi −=GSv The transconductance is calculated by taking the derivative GSDmdVdIg= (see graph below). Un-fortunately, gm depends on both VGS and VDS. For the JFET characteristic shown in Fig. 1, gm is al-most linearly dependent on VGS. 10203040VGS(V)g(mS)m-3 -2 -1 0


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