UMBC CMSC 611 - Instruction Set Architecture (19 pages)

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Instruction Set Architecture



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Instruction Set Architecture

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Pages:
19
School:
University of Maryland, Baltimore County
Course:
Cmsc 611 - Advanced Computer Architecture

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CMSC 611 Advanced Computer Architecture Instruction Set Architecture Some material adapted from Mohamed Younis UMBC CMSC 611 Spr 2003 course slides Some material adapted from Hennessy Patterson 2003 Elsevier Science Register Memory Arch memory addresses Max number of operands 0 3 SPARC MIPS PowerPC ALPHA 1 2 Intel 60X86 Motorola 68000 2 2 VAX also has 3 operands format 3 3 VAX also has 2 operands format Examples Effect of the number of memory operands Type Advantages Disadvantages Reg Reg 0 3 Fixed length instruction encoding Simple code generation model Similar execution time pipeline Higher instruction count Some instructions are short leading to wasteful bit encoding Reg Mem 1 2 Direct access without loading Easy instruction encoding Can restrict register available for use Clocks per instr varies by operand type Source operands are destroyed Mem Mem 3 3 No temporary register usage Compact code Less potential for compiler optimization Can create memory access bottleneck Memory Addressing The address of a word matches the byte address of one of its 4 bytes The addresses of sequential words differ by 4 word size in byte Words addresses are multiple of 4 alignment restriction Misalignment if allowed complicates memory access and causes programs to run slower Object addressed Aligned at byte offsets Misaligned at byte offsets Byte 1 2 3 4 5 6 7 Never Half word 0 2 4 6 1 3 5 7 Word 0 4 1 2 3 5 6 7 Double word 0 1 2 3 4 5 6 7 Processor 12 100 8 10 4 101 0 1 Address Data Memory Byte Order Given N bytes which is the most significant which is the least significant Big Endian Leftmost most significant byte word address Intel among others Little Endian Rightmost least significant byte word address Motorola TCP IP among others Byte ordering can be as problem when exchanging data among different machines Can also affect array index calculation or any other operation that treat the same data a both byte and word Addressing Modes How to specify the location of an operand



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