CMSC 611: AdvancedCMSC 611: AdvancedComputer ArchitectureComputer ArchitectureInstruction Set ArchitectureInstruction Set ArchitectureSome material adapted from Mohamed Younis, UMBC CMSC 611 Spr 2003 course slidesSome material adapted from Hennessy & Patterson / © 2003 Elsevier Science# memory addresses Max. number of operands Examples 0 3 SPARC, MIPS, PowerPC, ALPHA 1 2 Intel 60X86, Motorola 68000 2 2 VAX (also has 3 operands format) 3 3 VAX (also has 2 operands format) Effect of the number of memory operands:TypeAdvantagesDisadvantagesReg-Reg (0,3)- Fixed length instruction encoding- Simple code generation model- Similar execution time (pipeline)- Higher instruction count- Some instructions are short leading to wasteful bit encodingReg-Mem (1,2)- Direct access without loading- Easy instruction encoding- Can restrict # register available for use- Clocks per instr. varies by operand type- Source operands are destroyedMem-Mem (3,3)- No temporary register usage- Compact code- Less potential for compiler optimization- Can create memory access bottleneckRegister-Memory ArchRegister-Memory Arch10010101112840DataAddressMemoryProcessorObject addressed Aligned at byte offsets Misaligned at byte offsets Byte 1,2,3,4,5,6,7 Never Half word 0,2,4,6 1,3,5,7 Word 0,4 1,2,3,5,6,7 Double word 0 1,2,3,4,5,6,7 Memory AddressingMemory Addressing• The address of a word matches the byte address of one of its 4bytes• The addresses of sequential words differ by 4 (word size in byte)• Words' addresses are multiple of 4 (alignment restriction)– Misalignment (if allowed) complicates memory access and causesprograms to run slowerByte OrderByte Order• Given N bytes, which is the most significant, which isthe least significant?– “Big Endian”• Leftmost / most significant byte = word address• Intel (among others)– “Little Endian”• Rightmost / least significant byte = word address• Motorola, TCP/IP (among others)• Byte ordering can be as problem when exchangingdata among different machines• Can also affect array index calculation or any otheroperation that treat the same data a both byte andword.Addressing ModesAddressing Modes• How to specify the location of an operand(effective address)• Addressing modes have the ability to:– Significantly reduce instruction counts– Increase the average CPI– Increase the complexity of building a machine• VAX machine is used for benchmark datasince it supports wide range of memoryaddressing modes• Can classify based on:– source of the data (register, immediate or memory)– the address calculation (direct, indirect, indexed)Mode Example Meaning When used Register ADD R4, R3 Regs[R4] = Regs[R4] + Regs[R3] When a value is in a register Immediate ADD R4, #3 Regs[R4] = Regs[R4] + 3 For constants Register indirect ADD R4, (R1) Regs[R4] = Regs[R4] + Mem[Regs[R1] ] Accessing using a pointer or a computed address Direct or absolute ADD R4, (1001) Regs[R4] = Regs[R4] + Mem[ 1001 ] Sometimes useful for accessing static data; address constant may need to be large Displacement ADD R4, 100 (R1) Regs[R4] = Regs[R4] + Mem[ 100 + Regs[R1] ] Accessing local variables Indexed ADD R4, (R1 + R2) Regs[R4] = Regs[R4] + Mem[Regs[R1] + Regs[R2]] Sometimes useful in array addressing: R1 = base of the array: R2 = index amount Autoincrement ADD R4, (R2) + Regs[R4] = Regs[R4] + Mem[Regs[R2] ] Regs[R2] = Regs[R2] + d Useful for stepping through arrays within a loop. R2 points to start of the array; each reference increments R2 by d. Auto decrement ADD R4, -(R2) Regs[R2] = Regs[R2] – d Regs[R4] = Regs[R4] + Mem[Regs[R2] ] Same use as autoincrement. Autodecrement/increment can also act as push/pop to implement a stack Scaled ADD R4, 100 (R2) [R3] Regs[R4] = Regs[R4] + Mem[100 + Regs[R2] + Regs[R3] * d] Used to index arrays. Example of Addressing ModesExample of Addressing ModesFocus on immediate anddisplacement modes sincethey are used the mostBased on SPEC89 on VAXAddressing Mode UseAddressing Mode UsePercentage of displacementNumber of bits needed for a displacement value in SPEC2000 benchmarkData is based on SPEC2000 on Alpha(only 16 bit displacement allowed)Displacement AddressingDisplacement AddressingModesModes• The range of displacement supportedaffects the length of the instructionStatistics are based on SPEC2000 benchmark on AlphaImmediate Addressing ModesImmediate Addressing Modes• Immediate values for what operations?Measurements were taken on Alpha(only 16 bit immediate value allowed)Percentage of Immediate ValuesNumber of bits needed for a immediate values in SPEC2000 benchmarkDistribution of ImmediateDistribution of ImmediateValuesValues• Range affects instruction length– Similar measurements on the VAX (with 32-bit immediatevalues) showed that 20-25% of immediate values werelonger than 16-bitsAddressing Mode for SignalAddressing Mode for SignalProcessingProcessing• DSP offers special addressing modes tobetter serve popular algorithms• Special features requires either handcoding or a compiler that uses suchfeaturesFast Fourier Transform0 (0002) ! 0 (0002)1 (0012) ! 4 (1002)2 (0102) ! 2 (0102)3 (0112) ! 6 (1102)4 (1002) ! 1 (0012)5 (1012) ! 5 (1012)6 (1102) ! 3 (0112)7 (1112) ! 7 (1112)Addressing Mode for SignalAddressing Mode for SignalProcessingProcessing• Modulo addressing:– Since DSP deals withcontinuous data streams,circular buffers common– Circular or moduloaddressing: automaticincrement and decrement /reset pointer at end of buffer• Reverse addressing:– Address is the reverse orderof the current address– Expedites access /otherwise require a numberof logical instructions orextra memory accessesByte Halfword WordRegistersMemoryMemoryWordMemoryWordRegisterRegister1. Immediate add ressing2. Register addressing3. Base addres sing4. PC-relative addressing5. Pseudodirect addressingop rs rtop rs rtop rs rtopoprs rtAddressAddressAddressrd . . . functImmediatePCPC++Summary of MIPS AddressingSummary of MIPS AddressingModesModesExample:Translation of a segment of a C program to MIPS assembly instructions:C: f = (g + h) - (i + j)(pseudo)MIPS:add t0, g, h # temp. variable t0 contains "g + h"add t1, i, j # temp. variable t1 contains "i + j"sub f, t0, t1 # f = t0 - t1 = (g + h) - (i + j)Operations of the ComputerOperations of the ComputerHardwareHardware“There must certainly be instructions for performing the fundamental arithmetic operations.”Burkes, Goldstine and Von Neumann, 1947MIPS