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CMSC 611CMSC 611Introduction /Introduction / Evaluating CostEvaluating CostSome material adapted from Mohamed Younis, UMBC CMSC 611 Spr 2003 course slidesSome material adapted from David Culler, UC Berkeley CS252, Spr 2002 course slides, © 2002 UC BerkeleySome material adapted from Hennessy & Patterson / © 2003 Elsevier ScienceR0 - R31PCHILOOPOPOPrsrtrd sa functrsrtimmediatejump target3 Instruction Formats: all 32 bits wideRegistersMIPS R3000 ISA (Summary)MIPS R3000 ISA (Summary)• Instruction Categories– Load/Store– Computational– Jump and Branch– Floating Point• coprocessor– Memory Management– Special Slide: David Patterson, UCBLogic Designer's ViewISA LevelFunctional Units & InterconnectMachine OrganizationMachine Organization• Capabilities & performancecharacteristics of principalfunctional units (e.g., Registers,ALU, Shifters, Logic Units, ...)• Ways in which thesecomponents are interconnected• Information flows betweencomponents• Logic and means by which suchinformation flow is controlled• Choreography of functional unitsto realize the instruction setarchitecture• Register Transfer LevelDescription Slide: David Patterson, UCBFloating-point UnitInteger UnitInstCacheRefMMUDataCacheStoreBufferBus InterfaceSuperSPARCL2$CCMBus ModuleMBusL64852MBus controlM-S AdapterSBusDRAM ControllerSBusDMASCSIEthernetSTDIOserialkbdmouseaudioRTCBoot PROMFloppySBusCardsExample OrganizationExample Organization• TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20 Slide: David Patterson, UCBProcessorComputerControlDatapathMemory DevicesInputOutpute.g., Keyboard,mouse, diske.g. Printer,Monitor, diskConnections forInformation flowCoordinationfor properoperationGeneral Comp OrganizationGeneral Comp Organization• Every piece of every computer, past and present:input, output, memory, datapath and control• The design approach is constrained by the cost andsize and capabilities required from every component• An example design target can be 25% of cost onProcessor, 25% of cost on minimum memory size,rest on I/O devices, power supplies, and chassistemp = v[k];v[k] = v[k+1];v[k+1] = temp;lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 °°ALUOP[0:3] <= InstReg[9:11] & MASKHigh Level LanguageProgramAssembly LanguageProgramMachine LanguageProgramControl Signal SpecificationCompilerAssemblerMachine InterpretationLevels of BehaviorLevels of BehaviorRepresentationRepresentation Slide: David Patterson, UCBLevels of AbstractionLevels of Abstraction• S/W and H/W consists of hierarchical layers of abstraction,each hides details of lower layers from the above layer• The instruction set arch. abstracts the H/W and S/Winterface and allows many implementation of varying costand performance to run the same S/WInstruction Set ArchitectureApplicationsOperating SystemFirmwareCompilerInstruction Set Processor I/O SystemDatapath & ControlDigital DesignCircuit DesignLayout Figure: David Patterson, UCBComputerArchitectureTechnologyProgrammingLanguagesOperatingSystemsHistoryApplicationsForces on ComputerForces on ComputerArchitectureArchitecture• Programming languages might encourage architecturefeatures to improve performance and code size, e.g. Fortranand Java• Operating systems rely on the hardware to support essentialfeatures such as semaphores and memory management• Technology always raises the bar for what could be done andchanges design’s focus• Applications usually derive capabilities and constrains• History provides the starting point, filters out mistakes Figure: David Patterson, UCBHigher logic density gave room for instruction pipeline & cachePerformance optimization no longer implies smaller programsComputers became lighter and more power efficientTechnology Technology –– dramatic change dramatic change• Processor– logic capacity: about 30% increase per year– clock rate: about 20% increase per year• Memory– DRAM capacity: about 60% increase per year(4x / 3 years)– Memory speed: about 10% increase per year– Cost per bit: about 25% improvement per year• Disk– Capacity: about 60% increase per yeari4004i8086i80386Pentiumi80486i80286SU MIPSR3010R4400R100001000100001000001000000100000001000000001965 1970 1975 1980 1985 1990 1995 2000 2005T r a n s i s t o r si80x86M68KMIPSAlphaIn ~1985 the single-chip processor and the single-board computer emergedIn the 2004+ timeframe, today’s mainframes may be a single-chip computerCMOS improvements:• Die size: 2X every 3 yrs• Line width: halve / 7 yrs! Alpha 21264: 15 million! Pentium Pro: 5.5 million! PowerPC 620: 6.9 million! Alpha 21164: 9.3 million! SPARC Ultra: 5.2 millionTechnology ImpactTechnology Impact Figure: David Patterson, UCB0501001502002503003501982 1984 1986 1988 1990 1992 1994YearPerformanceRISCIntel x8635%/yrRISCintroductionPerformance now improves ~ 50% per year (2x every 1.5 years) Alpha 21264 exceeds 1200 Processor Performance (SPEC)Processor Performance (SPEC) Slide: David Patterson, UCBRelative PerformanceTechnologyArchitecture+TechnologyRelying on technology alone would have kept us 8 years behindProcessor Performance (SPEC)Processor Performance (SPEC)One Architectural FactorOne Architectural Factor!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!! !!! !!!!!!! !!!!!! !!!1,00010,000100,0001,000,00010,000,000100,000,0001970 1975 1980 1985 1990 1995 2000 2005Bit-level parallelism Instruction-level Thread-level (?)i4004i8008i8080i8086i80286i80386R2000Pentium R10000R3000Transistors Figure: David Culler, UCB1992100,00010,00010001001019901988198619841982198019781976Year of introduction16M4M1M256K16K64K1994199664MYear Size(Mb) Cyc time1980 0.0625 250 ns1983 0.25 220 ns1986 1 190 ns1989 4 165 ns1992 16 145 ns1996 64 120 ns2000 256 100 nsTechnology Impact on DesignTechnology Impact on Design• DRAM capacity 4x / 3 yrs; 16,000x in 20 yrs!• Programming concern: cache not RAM size• Processor organization becoming main focus for performanceoptimization• HW designer focus not only performance but functionalintegration and power consumption (e.g. system on a chip)TechnologyTrendsEvaluate ExistingEvaluate ExistingSystems for Systems for BottlenecksBottlenecksBenchmarksSimulate NewSimulate NewDesigns andDesigns andOrganizationsOrganizationsWorkloadsImplement NextImplement NextGeneration SystemGeneration


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UMBC CMSC 611 - Introduction / Evaluating Cost

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