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EE 308 Spring 2010 Address Data and Control Buses A microprocessor system uses address data and control buses to communicate with external memory and memory mapped peripherals The address bus determines which memory location to access The control bus specifies whether the memory cycle is a read into microprocessor or a write out of microprocessor cycle and specifies timing information for the cycle The data bus contains the data being transfered during the memory cycle For example consider the following simple MC9S12 program which continuously increments the contents of address 0x0400 loop org 0x2000 inc bra 0x0400 loop The program is stored in memory starting at memory location 0x2000 The MC9S12 Program Counter starts at address 0x2000 The MC9S12 reads the first instruction inc 0x0400 located in address 0x2000 through 0x2002 The MC9S12 then reads the contents of memory location 0x0400 takes an internal memory cycle to increment the value then writes the new value out to address 0x0400 The MC9S12 then reads the next instruction bra 0x2000 The MC9S12 takes one memory cycle to load the program counter with the new value of 0x2000 and to clear its internal pipeline then reads the instruction at 0x2000 to figure out what to do next 1 EE 308 The MC9S12 address data and control buses simplified Note The following diagram assumes that the MC9S12 accesses one byte at a time The MC9S12 actually accesses two bytes 16 bits at a time when it can What actually occurs on the MC9S12 bus is a little more complicated than what is shown below MC9S12 ADDRESS DATA AND CONTROL BUS SIMPLIFIED ADDR 2000 2 DATA 72 2001 2002 0400 FFFF 04 00 A3 00 org 0x2000 inc 0x0400 bra loop 0400 2003 2004 FFFF 2000 20 FB 00 72 A4 R W loop 2000 2001 2002 2003 2004 72 04 00 20 FB inc 0x0400 bra 0x2000 Spring 2010 EE 308 Spring 2010 The MC9S12 Memory Map The MC9S12 has address regions occupied by internal memory and peripherals A diagram showing which address regions are used is called a memory map Here is



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