View Full Document

Post-Floorplanning Power/Ground Ring Synthesis for Multiple-Supply-Voltage Designs



View the full content.
View Full Document
View Full Document

14 views

Unformatted text preview:

Post Floorplanning Power Ground Ring Synthesis for Multiple Supply Voltage Designs Wan Ping Lee Diana Marculescu Yao Wen Chang Graduate Institute of Electronics Engineering National Taiwan University Taipei 10617 Taiwan Electrical and Computer Engineering Carnegie Mellon University Pittsburgh PA 15213 Department of Electrical Engineering National Taiwan University Taipei 10617 Taiwan planet eda ee ntu edu tw dianam ece cmu edu ABSTRACT The multiple supply voltage MSV design style has been extensively applied to mitigate dynamic power consumption The MSV design paradigm however brings many crucial challenges especially in the power ring synthesis Unlike the previous works that form the power rings as the enclosing bounding boxes of voltage islands we enable power rings alignment to the outer boundaries of voltage islands With this new formulation the power ring estimation becomes more accurate during floorplanning and the power ring synthesis is more practical after floorplanning In this paper we first propose a linear time voltage island power ring search algorithm to identify the power rings of voltage islands and then present a linear time optimal power ring corner patching algorithm to minimize the number of corners in the power rings by using post floorplanning whitespaces Experimental results first demonstrate that reducing corners in power rings significantly mitigates IR drop and then show that the proposed algorithm can reduce the number of corners by 33 on average for the GSRC floorplan benchmarks In particular the total running time for the 16 GSRC benchmarks is less than one second on an AMD 64 machine with a 2 2 GHz CPU and 8 GB memory Categories and Subject Descriptors B 7 2 Integrated Circuits Design Aids General Terms Algorithms Design Performance Keywords VLSI Physical Design Floorplanning Multiple Supply Voltage Design 1 INTRODUCTION Performance constrained low power design has been studied extensively in the literature Among existing techniques the This work was supported in part by TSMC and NSC of Taiwan under Grant No s NSC 96 2752 E 002 008 PAE NSC 96 2628 E 002 248 MY3 NSC 96 2628 E 002 249 MY3 and NSC 96 2221 E 002 245 Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page To copy otherwise to republish to post on servers or to redistribute to lists requires prior specific permission and or a fee ISPD 09 March 29 April 1 2009 San Diego California USA Copyright 2009 ACM 978 1 60558 449 2 09 03 5 00 ywchang cc ee ntu edu tw multiple supply voltage MSV design style 13 provides an effective way for dynamic power reduction Generally dynamic power consumption can be computed by 2 Pdynamic k Cload Vdd f where k is the circuit switching rate Cload is the loading capacitance Vdd is the supply voltage and f is the clock frequency The dynamic power consumption is proportional to the square of Vdd implying that lowering supply voltages can effectively reduce dynamic power consumption While dynamic power consumption is mitigated by the MSV technique the MSV design style induces several crucial challenges for power ring synthesis In this work to make the MSV designs more flexible and more practical we allow one or several blocks to form a voltage island in other words each supply voltage may have several physical independent voltage islands whose power rings are naturally independent As a result this method provides much higher flexibility but dramatically increases the complexity of the power ring synthesis To reduce the complexity of the power ring synthesis previous works defined the power rings as consisting of the bounding boxes of the voltage islands However treating the problem this way is perhaps over simplistic an example is shown in Section 2 Therefore a more practical methodology for MSV power ring synthesis is desired In this paper we propose a power ring synthesis methodology that first identifies the power rings that align to the outer boundaries of voltage islands and then adjusts the power rings for fewer corners while fixing the positions of the blocks at the floorplanning packing or post floorplanning stages Furthermore the proposed methodology is proven to take linear time when employing a hash table based algorithm Due to its efficiency our methodology can be applied to post floorplan MSV design as well as MSV aware floorplan synthesis MSV systems have been applied at various design stages such as the floorplanning stage 3 4 5 7 10 the post floorplanning stage 9 the placement stage 8 or the post placement stage 1 14 15 Most of these works do not consider power network synthesis or consider it by rough models e g the boundingbox power ring formulation However such an approach might be over simplistic for power ring estimation during floorplanning and could be impractical for power ring synthesis at the postfloorplanning stage In contrast our outer boundary formulation is amenable to being employed in the floorplanning and postfloorplanning stages because of its accuracy and practicality Section 2 gives an example to compare the two power ring formulations the traditional bounding box formulation and our outerboundary one In addition to the aforementioned novel methodology of power rings for voltage islands we summarize our major contributions as follows To the best of our knowledge this is the first work proposing power ring alignment to the outer boundaries of voltage islands Compared with previous works that approximate power rings by the bounding boxes of voltage islands our methodology is more realistic power rings A linear time voltage island power ring contour search algorithm is presented When using a hash table approach the proposed algorithm takes only linear time on average to search for a power ring A linear time optimal power ring corner patching algorithm is presented While power rings are aligned to the outer boundaries of voltage islands there may be multiple corners for each power ring This implies that a significant number of vias would be introduced in the power rings which is definitely not desirable Therefore it is important to minimize the number of corners in the power rings by patching the whitespaces in the given floorplan into the circuit blocks and make power rings more regular We empirically validate


Access the best Study Guides, Lecture Notes and Practice Exams

Loading Unlocking...
Login

Join to view Post-Floorplanning Power/Ground Ring Synthesis for Multiple-Supply-Voltage Designs and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Post-Floorplanning Power/Ground Ring Synthesis for Multiple-Supply-Voltage Designs and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?