UMD CMSC 411 - Memory Hierarchy (25 pages)

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Memory Hierarchy



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Memory Hierarchy

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Pages:
25
School:
University of Maryland, College Park
Course:
Cmsc 411 - Computer Systems Architecture
Computer Systems Architecture Documents

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Administrivia Computer Systems Architecture CMSC 411 Unit 5 Memory Hierarchy HW 3 due today questions Quiz 2 Tuesday Oct 12 on Unit 3 basic pipelining practice quiz posted answers posted later today questions Alan Sussman October 7 2004 Read Chapter 5 except 5 11 5 15 CMSC 411 Alan Sussman 2 Last time Long instructions can cause structural hazards and WAW hazards why detect hazards early to allow precise exceptions in ID pipeline stage and delay EX cycle if problem detected can delay WB use history or future file let OS deal with it to enable precise exceptions Cache Memory MIPS R4000 pipeline design 8 stage pipeline superpipelining extra stages come from multi cycle cache accesses 2 cycle load delay and 3 cycle branch delay 1 delay slot 2 cycle stall for taken branches complex FP pipeline 8 stages used in different combinations for different operations CMSC 411 Alan Sussman 3 Issues to consider First there is main memory How big should the fastest memory cache memory be How do we decide what to put in cache memory If the cache is full how do we decide what to remove How do we find something in cache How do we handle writes CMSC 411 Alan Sussman Jargon frame address which page block number which cache block contents the data 5 CMSC 411 A Sussman from D O Leary CMSC 411 Alan Sussman 6 1 Then add a cache How does cache memory work Jargon Each address of a memory location is partitioned into The following slides discuss what cache memory is three organizations for cache memory block address tag index direct mapped set associative fully associative block offset how the bookkeeping is done Important note All addresses shown are in octal Addresses in the book are usually decimal Fig 5 5 CMSC 411 Alan Sussman 7 CMSC 411 Alan Sussman What is cache memory Main memory first Main memory Blocks are grouped into frames pages 3 frames in this picture Main memory is divided into cache blocks Each block contains many words 16 64 common now CMSC 411 Alan Sussman 9 CMSC 411 Alan



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