Signaling in High-Performance Memory Systems of 59ISSCC 1999Signaling in High-Performance Memory SystemsJohn PoultonResearch ProfessorDepartment of Computer ScienceUniversity of North Carolina at Chapel [email protected]://www.cs.unc.edu/~jp1Signaling in High-Performance Memory Systems of 59ISSCC 19992What's a Signaling System?Data In Data OutVRef+−123TransmitterTransmission LineReceiver4Terminator5Clock(s)1. Transmitter encodes data as voltage/current signal levels onto the line2. Transmission line delivers the signal to the receiver3. Receiver compares signal with reference to recover data4. Terminator removes signals from line, once they're received5. Clocks tell transmitter when to drive a new signal, receiver when to sampleFor this discussion, we'll assume • binary (two-level) signaling • direct encoding (e.g. VHi = "1", VLo = "0")Signaling in High-Performance Memory Systems of 59ISSCC 1999A Bus has • multiple transmitters and receivers ("drops"), often paired up as transceivers • transceivers share a common transmission line • any one drop may send; any (or all) drops receive at a given timeThis is not a bus:...it's a bidirectional link.This isn't a bus, either:...it's a linear network.3Signaling in High-Performance Memory Systems of 59ISSCC 19994 Outline• Transmission Lines• Bus-based Signaling Systems• Alternative Signaling Approaches° Impedance, propagation, reflection° Impedance discontinuities° Termination methods° Loss mechanisms° Cross-talk, modes, impedance matrices° Typical properties of PC-board T-lines° Problems: lowered Z 0, v, fc° CMOS , voltage-mode signaling° SSTL & SLDRAM° Open-drain systems, BTL, GTL, etc° RAMBUS° Summary• Signaling Methods° Voltage-mode vs Current-mode° Single-ended vs Differential° References° Clocking• Wrapup, Questions, Discussion° Future Prospects° Serial Links528293536555657Signaling in High-Performance Memory Systems of 59ISSCC 19995Transmission LinesVIEBDielectric (εεεε,,,,µµµµ)dxLdx RdxCdxGdxL,R,C,G are per unit lengthIf I,V change at the drive point, B,E change as well; disturbance propagates away from the drive point at the speed of lightIF the dielectric is homogeneousand µ = µ0 (as usual)v=1εµ≈cεrL =ΦII(x)/2V(x)+ + + ++ + + +I(x)− − − −− − − −I(x+dx)I(x)/2V(x+dx)R =dVIVG=dI...leads to circuit modelx(Quasi-TEM guided wave propagation)dx=QVCSignaling in High-Performance Memory Systems of 59ISSCC 19996Characteristic ImpedanceLdx RdxCdx GdxImpedance is somevalue Z0Peel off dx worth of line; impedance still Z0Semi-infinite lineStill semi-infinitedxZ0So, original line looks like this:Z0Z0= Rdx + jωLdx +1jωCdx + Gdx + 1/Z0(Z0–Rdx–jωLdx)(jωCdx + Gdx + 1/Z0) = 1Z0(G+jωC)dx – (R+jωL)dx(G+jωC)dx –(R+jωL)dxZ0= 0Z0=R+jωLG+jωC=LCwhen R=G=0Impedance of a (near-) lossless line is frequency independent and real--just a resistance!Signaling in High-Performance Memory Systems of 59ISSCC 19997Propagation ConstantLdx RdxCdxGdxZ0V(x) V(x+dx)I(x)∂V(x)∂x=–(R+jωL)I(x) =–(R+jωL)V(x)Z0∂V(x)∂x= –[(G+jωC)(R+jωL)]1/2V(x)V(x) = V(0) e–AxA = [(G+jωC)(R+jωL)]1/20Phase change along line, where wave velocity isAttenuation0αR=R2Zconductor lossαD=GZ02dielectric lossv=1LC=1εµ(x) = V(0) e–jω LCxe–(αR+ αD)xdistance x along line2πvωe–(αR+ αD)xReV(x)V(0);Taylor exp.A=(jωRC + jωGL –ω2LC)1/2=jω LC(1–jRC+GLωLC)1/2=jω LC(1–jRC+GL2ωLC)V(x)V(0)=jωLC +R2Z+GZ02Signaling in High-Performance Memory Systems of 59ISSCC 19998Characteristic Impedance of Some Typical LineshswrsabcRDC=ρπa2+ρπ(c2–b2)C =2πεlog(b/a)Z0=log(b/a)2πµεRDC=2ρwhC =εwsZ0=swµεRDC=2ρπr2C =πεlog(s/r)Z0=log(s/r)πµεrsRDC=ρπr2C =2πεlog(2s/r)Z0=log(2s/r)2πµεshwRDC=ρwhC ≈εws+2πεlog(4s/h)Z0=εµCGood only for homogeneous dielectrics, where L = εµ/CCaveats:1. Approximations only, useful for 1rst-order estimates; do NOT use these formulas for anything serious! Fire up your field solver...2. Good only for homogeneous dielectrics; PC-board microstrips are not homogeneous.3. Since µ = µ0 for many dielectrics, Main thing to note: Z0 is always a function of ratios of dimensions!µε=µ0ε0•1εr=377ΩεrSignaling in High-Performance Memory Systems of 59ISSCC 19999RC vs LC BehaviorLdx RdxCdxIn many situations, it's reasonable to set G=0 (dielectrics are pretty good for many signaling systems)What about R?If jωL << R, then the line is mainly an RC transmission lineIf jωL >> R, then mainly an LC lineEvery line has some frequencyf0=R2πLbelow which it's RC and above which it's LCSignaling in High-Performance Memory Systems of 59ISSCC 1999100.5µ0.5µ2µSiO2, εr = 3.9A typical on-chip wire:0.7mil5 mil6 mil"FR-4", εr = 4.5A typical PC-board wire:6 milL = 0.6 nH/mmC = 73 fF/mmRdc = 120 Ω/mmf0 = 32 GHzThe RC model works for CMOS! (...well, mostly...)L = 0.5 nH/mmC = 104 fF/mmRdc = 0.008 Ω/mmf0 = 2.5 MHzThe LC model is OK for PC board traces (mostly... R = R(f) from skin effect)RC & LC ApproximationsSignaling in High-Performance Memory Systems of 59ISSCC 199911Signal ReturnsLRCGImpedance of line AND it's return!In striplines, return current in planes is concentrated near signal conductor, so return impedance is significantSignaling in High-Performance Memory Systems of 59ISSCC 199912Skin EffectEdepth into conductor where E falls to 1/e of surface valueapproximation!Skin-depth frequency:Skin depth:fs=4444ρπ µs2=4444ρπ µ0s2non-magneticconductorssfrequency at which skin-depth equals half the conductor thicknessδ=ρπfµSignaling in High-Performance Memory Systems of 59ISSCC 199913Conductor LossR(f) = RDCffs(x)V(0)=e–αCLAttn (dB/m) = 10 log10(P(1m)P(0))= 20 log10(V(1m)V(0))= 8.686 • αCConductor fsAttn (@ 1GHz)RG-223/U5-mil, 0.5 OzPCB trace0.5µµµµ x 0.5µµµµ on-chip wire22.5 KHz56 MHz113 GHz0.5 dB/m6 dB/msame as DC!Some typical signal conductorspossibly a concern for bus-based memory signalingV(6")V(0)= 0.90 @ 1GHzαC(f) =2Z0ffsDCRDC must include returnsSignaling in High-Performance Memory Systems of 59ISSCC 199914Dielectric LossDielectricεεεεr"FR-4"GETEK4.7Some typical PC Board Dielectrics3.9Teflon 2.25tanδδδδ0.0350.0100.0018.86ααααD @1GHz1010Hz(µwave) 1013Hz(infrared)1015Hz(light)εrG(ω)freq"RF" range:G≈k•ω...so, can definetanδ=GωCionicdipolar electronicαD=GZ02=2πf C tanδL/C2=πf tanδLC=ππππεεεεrf tanδδδδcααααDonly for