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A Compiler-in-the-Loop (CIL) Framework to Explore Horizontally Partitioned Cache (HPC) Architectures



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A Compiler in the Loop CIL Framework to Explore Horizontally Partitioned Cache HPC Architectures Aviral Shrivastava Ilya Issenin Nikil Dutt Compiler and Microarchitecture Lab Center for Embedded Systems Arizona State University Tempe AZ USA M C L ACES Lab Center For Embedded Computer Systems University of California Irvine CA USA Power in Embedded Systems Power Most important factor in usability of electronic devices Device Battery life Charge time Battery weight Device weight Apple iPOD 2 3 hrs 4 hrs 3 2 4 8 oz Panasonic DVD LX9 1 5 2 5 hrs 2 hrs 0 72 2 6 pounds Nokia N80 20 mins 1 2 hrs 1 6 4 73 oz Performance requirements of handhelds Increase by 30X in a decade Battery capacity Increase by 3X in a decade Considering technological breakthroughs e g fuel cells M ASP DAC 2008 2 Copyright 2008 ASU Memory Subsystem Embedded System Design Memory subsystem design parameters Minimize power at minimal performance loss Significant impact on power and performance May be the major consumer of system power Very significant impact on performance Need to be chosen very carefully Compiler influences the way application uses memory M Compiler should take part in the design process ASP DAC 2008 Compiler in the Loop Memory Design 3 Copyright 2008 ASU Horizontally Partitioned Cache HPC Originally proposed by Gonzalez et al in 1995 Processor More than one cache at the same level Pipeline of memory hierarchy Caches share the interface to memory and processor Each page is mapped to exactly one cache Main Cache Mini Cache Mapping is done at page level granularity Specified as page attributes in MMU Mini Cache is relatively small Example Intel StrongARM and XScale M ASP DAC 2008 4 Memory Copyright 2008 ASU Performance Advantage of HPC Observation Often arrays have low temporal locality Separate low temporal locality data from high temporal locality data Image copying each value is used only once or a few times But the stream evicts all other data from the cache Array a low temporal



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