Atari Space Race PCB (42 pages)

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Atari Space Race PCB



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Fundamentals of Computer Systems Memory Stephen A Edwards Columbia University Spring 2012 Atari Space Race 1973 Atari Space Race PCB Front Back mirrored Read Only Memories Combinational Functions Ak 1 Dn 1 2k n A2 ROM D1 A1 D0 A0 General ROM 2k words n bits per word row column A6 A5 A4 A3 A2 A1 A0 128 1 ROM D Example Space Race ROM Implementing ROMs 0 0 1 Z not connected Bitline 2 Bitline 1 Bitline 0 0 1 0 0 A1 A0 2 to 4 Decoder 2 1 Add Data 00 01 10 11 1 1 1 1 0 1 0 0 0 1 0 1 1 1 Wordline 0 0 011 110 100 010 Wordline 1 Wordline 2 3 Wordline 3 D2 D1 D0 Implementing ROMs 0 0 1 Z not connected Bitline 2 Bitline 1 Bitline 0 0 0 1 0 0 1 A1 A0 1 1 2 to 4 Decoder 1 2 011 110 100 010 3 1 1 1 1 0 1 0 0 0 1 0 0 1 Add Data 00 01 10 11 1 0 Wordline 0 0 Wordline 1 Wordline 2 0 Wordline 3 1 D2 0 D1 0 D0 Implementing ROMs 0 0 1 Z not connected 0 1 0 0 1 A1 A0 1 1 1 Add Data 00 01 10 11 2 to 4 Decoder 2 011 110 100 010 3 D2 D1 D0 Implementing ROMs 0 0 1 Z not connected 0 1 1 0 0 1 A1 A0 1 1 2 to 4 Decoder 0 2 1 Add Data 00 01 10 11 1 011 110 100 010 3 1 1 D2 0 D1 0 D0 Atari Space Race Schematic The 1971 DEC M792 YB Bootstrap Diode Matrix 32 word 16 bit 64 byte ROM diode matrix CMOS Mask Programmed ROMs Add Data 00 01 10 11 011 110 100 010 ROM programmed by selectively connecting drain wires Active high wordlines Mask ROM Die Photo Color PROM in Pac Man 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 1F 00 07 66 EF 00 F8 EA 6F 00 3F 00 C9 38 AA AF F6 00 00 A Floating Gate MOSFET Cross section of a NOR FLASH transistor Kawai et al ISSCC 2008 Renesas Floating Gate n channel MOSFET SiO2 Control Gate Floating Gate Source Drain Channel Floating gate uncharged Control gate at 0V Off Floating Gate n channel MOSFET SiO2 Control Gate Floating Gate Source Drain Channel Floating gate uncharged Control gate positive On Floating Gate n channel MOSFET SiO2 Control Gate Floating Gate Source Drain Channel Floating gate negative Control gate at 0V Off Floating Gate n channel MOSFET SiO2 Control Gate Floating Gate Source Drain Channel Floating gate negative Control gate positive Off EPROMs and FLASH use Floating Gate MOSFETs Static Random Access Memory Cell Bit line Bit line Word line Layout of a 6T SRAM Cell Weste and Harris Introduction to CMOS VLSI Design Addison Wesley 2010 Intel s 2102 SRAM 1024 1 bit 1972 2102 Block Diagram SRAM Timing A12 A11 A2 6264 A1 8K 8 A0 SRAM CS1 CS2 WE OE D7 D6 D1 D0 CS1 CS2 WE OE Addr 1 Data write 1 2 read 2 6264 SRAM Block Diagram I O0 INPUT BUFFER I O1 A1 A2 A3 A4 A5 A6 A7 A8 I O2 I O3 256 x 32 x 8 ARRAY I O4 I O5 I O6 CE1 CE2 WE COLUMN DECODER POWER DOWN I O7 OE CY6264 1 Galaga CPU detail Namco Midway 1981 Dynamic RAM Cell Bit line Word line Our Old Pal the Space Race ROM 0 1 2 3 4 5 means 6 7 8 and 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 means Our Old Pal the Space Race ROM 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 The decoder or AND plane In a RAM or ROM computes every minterm Pattern is not programmable Our Old Pal the Space Race ROM 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 The decoder or OR plane One term for every output Pattern is programmable the contents of the ROM Our Old Pal the Space Race ROM 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 Can we do better Simplifying the Space Race ROM A0 A2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 A3 0 0 0 A1 0 0 1 0 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 1 mean don t expand these Essential minterms 0 1 0 0 0 0 0 0 0 1 1 0 0 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 Our New PAL the Space Race ROM 0 3210 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D0 3210 Our New PAL the Space Race ROM 0 3210 1 321 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D0 3210 D1 321 Our New PAL the Space Race ROM 0 3210 1 321 2 3210 D0 3210 D1 321 3 4 5 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D2 3210 3210 Our New PAL the Space Race ROM 0 3210 1 321 2 3210 D0 3210 D1 321 3 321 0 4 310 5 3210 6 7 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D2 3210 3210 D3 321 0 310 3210 3210 Our New PAL the Space Race ROM 0 3210 1 321 2 3210 D0 3210 D1 321 3 321 0 4 310 5 3210 6 3 210 7 32 10 8 9 10 11 12 13 14 15 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 D2 3210 3210 D3 321 0 310 3210 3210 D4 3 210 321 0 32 10 3210 Our New PAL the Space Race ROM 0 3210 1 321 2 3210 D0 3210 D1 321 3 321 0 4 310 …


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