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UK EE 462G - EE462G: Laboratory Assignment 7

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EE462G: Laboratory Assignment 7I. Instructional ObjectivesSee 6.4.4, 6.4.5, and 14.2 in HorensteinII. BackgroundIII. Pre-Laboratory ExercisesIV. Laboratory ExerciseEE462G: Laboratory Assignment 7NMOS and CMOS Logic Circuits byDr. A.V. RadunDr. K.D. Donohue (10/18/06)Department of Electrical and Computer EngineeringUniversity of KentuckyLexington, KY 40506 (Lab 6 report due at beginning of the period) (Pre-lab7 and Lab-7 Datasheet due at the end of the period)I. Instructional Objectives- Build and measure parameters of an NMOS logic circuit- Build and measure parameters of a CMOS logic circuit- Understand the advantages of CMOS logic circuitsSee 6.4.4, 6.4.5, and 14.2 in HorensteinII. BackgroundA simple logic inverter can be built using an N-channel MOSFET and a drain resistor as shown in Fig. 1. An alternative configuration using a P-channel MOSFET and a drain resistor is shown in Fig. 2. These inverter configurations serve as a useful introduction to transistors as digital devices, but they are no longer used in practical logic circuits. Active MOS transistors are used in place of the resistors due to their smaller size and lower power dissipation. Thus, modern logic circuits are made up entirely of transistors. Transistor-only logic circuits canbe designed using only N-channel MOSFETs, in which case the circuits are called NMOS circuits. Alternatively they can be designed using both N-channel and P-channel MOSFETs, in which case they are called complimentaryMOS or CMOS circuits. While the NMOS circuits are faster than the CMOS circuits, the CMOS circuits use less power and as a result have become more common.NMOSThe key to NMOS circuit designs is the diode-connected NMOS transistor. In the case of the NMOS logic inverter in Fig. 1, the transistor plays the same role as the pull-up resistor (RD) in the inverter circuit of Fig. 2. By connecting the MOSFET’s gate to its drain (VGS = VDS), as done in Figs. 1 and 3, the MOSFET transistor operates in its saturation region since trGSDS VVV  unless it goes into cutoff. The N channel MOSFET connected this way, supplies a constant current to the other transistors in the logic circuit, which serve as voltage controlled switches that directs the flow of current. If a digital high is present on the gate, current flows through the device. When a digital low is present on the gate, current cannot flow through the device and must flow elsewhere. If current is “sinked” to ground through a transistor, the output of the logic circuit is low. If current does not reach ground, it must flow out of the logic circuit, thus providing a logic high output. Examples of other MOS logic circuits are shown in Figs. 3 and 4. Vin Vout VDD S D D S G G Vin VDD Vout + - + - RD S D GFigure 1. NMOS Logic Inverter Circuit Figure 2. NMOS Logic Inverter Circuit with apull-up resister Vin1 Vout VDD Vin2 S D G S D G S D G Vin Vout VDD + - + - RD D S G Figure 3. NMOS Logic Gate Circuit Figure 4. PMOS Logic Circuit with a pull-downresisterCMOSComplementary MOS circuits use both N-channel and P-channel MOSFETs. In the case of the CMOS logic inverter in Fig. 5, the P-channel MOSFET plays the same role as the pull up resistor (RD) in the inverter circuit in Fig. 2. Note that when the input is low (0V) the N-channel MOSFET is off and the P-channel MOSFET is on (note its VGS = -VDD) . Thus, the output is high. When the input is high (Vin=VDD) the P-channel MOSFET is off (its VGS = 0V) and the N-channel MOSFET is on. Thus, the output is low. Vin Vout VDD S D G D S G Vin1 Vout VDD Vin2 S D G S D G D S G D S G Figure 5. CMOS Logic Inverter Circuit Figure 6. CMOS Logic Gate Circuit III. Pre-Laboratory ExercisesFor the N-channel MOSFET ZVN3306A use the values for Kp and Vtr that you used in previous labs. For the P-channel MOSFET ZVP3306A, let Kp = 2K= 0.145 A / V2, and Vtr = -2.8 V. For the N-channel MOSFET you can use values you estimated in the previous lab. Let VDD = 5 V. Let the input voltage be 0V for a logic zero and 5V forlogic 1.Truth Tables for Logic Circuits:1. Determine the truth tables for each circuit in Figs. 1 through 6 and indicate the logic function of each circuit.Circuit Transfer Characteristics for PMOS logic:2. For the circuit in Fig. 4 choose RD so that the drain current is approximately 1mA with a logic 1 output voltageand determine the value of VDS under this condition.3. Use SPICE to simulate the circuit in Fig. 4 with the RD value calculated in the previous problem. Use a 1kHz, 0V to 5V pulse (called pulse on B2SPICE options, but is actually a square wave) with 1-s rise and fall times. Plot the input voltage and the output voltage. Also plot the current from the VDD source.4. Write a Matlab program to compute and plot the transfer characteristics for the circuit of Fig. 4 with the RD value used in the previous problem. Hand in the plot and a printout of the commented program used to generate it. Circuit Transfer Characteristics for NMOS logic: 5. For the circuit in Fig. 1 determine the maximum drain current.6. Use SPICE to simulate the circuit in Fig. 1. Use a 1kHz, 0V to 5V pulse with 1-s rise and fall times. Plot the input voltage and the output voltage. Also plot the current from the VDD source. Determine the peak (instantaneous) output power during the input pulse transitions (switching events).7. Write a Matlab program to compute and plot the transfer characteristics for the circuit of Fig. 1. Hand in the plot and a printout of the commented program used to generate it. Circuit Transfer Characteristics for CMOS Logic:8. Use SPICE to simulate the circuit in Fig. 5. Use a 1kHz, 0V to 5V pulse with 1-s rise and fall times. Plot the input voltage and the output voltage. Also plot the current from the VDD source. Zoom in on the current plot around a switching event and determine the peak current during a switching event.9. Write a Matlab program to compute and plot the transfer characteristics for the circuit of Fig. 5. Hand in the plot and a printout of the commented program used to generate it. IV. Laboratory Exercise1. Obtain transfer characteristic of circuit in Fig. 4: Use the oscilloscope with appropriate setting to obtain the circuit’s TC. Determine the value of the threshold voltage for VGS from the circuit’s TC. Record the circuit’s transfer characteristic and indicate the point on your plot that you used to determine the threshold value of VGS. (Discussion: Compare to specified values used in


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UK EE 462G - EE462G: Laboratory Assignment 7

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