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USC EE 459Lx - DAC0830

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DAC0830/DAC0832General DescriptionFeaturesKey SpecificationsTypical ApplicationConnection DiagramsAbsolute Maximum Ratings Operating ConditionsElectrical Characteristics Electrical Characteristics Switching WaveformDefinition of Package PinoutsControl SignalsOther Pin FunctionsLinearity ErrorDefinition of TermsFIGURE 1. DAC0830 Functional Diagram Typical Performance CharacteristicsDAC0830 Series Application Hints1.0 DIGITAL CONSIDERATIONS1.1 Double-Buffered OperationFIGURE 2. Controlling Mutiple DACs FIGURE 3. FIGURE 4. 1.2 Single-Buffered Operation1.3 Flow-Through Operation1.4 Control Signal Timing1.5 Digital Signal FeedthroughFIGURE 5. Accommodating a High Speed System 2.0 ANALOG CONSIDERATIONS2.1 The Current Switching R-2R Ladder2.2 Basic Unipolar Output VoltageFIGURE 6. FIGURE 7. 2.3 Op Amp Considerations2.4 Bipolar Output Voltage with a Fixed Reference2.5 Zero AdjustmentFIGURE 8. FIGURE 9. 2.6 Full-Scale Adjustment2.7 Using the DAC0830 in a Voltage Switching Configuration FIGURE 10. Adding Full-Scale Adjustment FIGURE 11. Voltage Mode Switching FIGURE 12. Single Supply DAC FIGURE 13. Obtaining a Bipolar Output from a Fixed Reference with a Single Op Amp FIGURE 14. Bipolar Output with Increased Output Voltage Swing FIGURE 15. Single Supply DAC with Level Shift and Span- Adjustable Output FIGURE 16. FIGURE 17. FIGURE 18. 2.8 Miscellaneous Application Hints3.0 GENERAL APPLICATION IDEASApplicationsOrdering InformationPhysical DimensionsDAC0830/DAC08328-Bit µP Compatible, Double-Buffered D to A ConvertersGeneral DescriptionThe DAC0830 is an advanced CMOS/Si-Cr 8-bit multiplyingDAC designed to interface directly with the 8080, 8048,8085, Z80®, and other popular microprocessors. A depositedsilicon-chromium R-2R resistor ladder network divides thereference current and provides the circuit with excellenttemperature tracking characteristics (0.05% of Full ScaleRange maximum linearity error over temperature). The cir-cuit uses CMOS current switches and control logic toachieve low power consumption and low output leakagecurrent errors. Special circuitry provides TTL logic input volt-age level compatibility.Double buffering allows these DACs to output a voltagecorresponding to one digital word while holding the nextdigital word. This permits the simultaneous updating of anynumber of DACs.The DAC0830 series are the 8-bit members of a family ofmicroprocessor-compatible DACs (MICRO-DAC™).Featuresn Double-buffered, single-buffered or flow-through digitaldata inputsn Easy interchange and pin-compatible with 12-bitDAC1230 seriesn Direct interface to all popular microprocessorsn Linearity specified with zero and full scale adjustonly—NOT BEST STRAIGHT LINE FIT.n Works with±10V reference-full 4-quadrant multiplicationn Can be used in the voltage switching moden Logic inputs which meet TTL voltage level specs (1.4Vlogic threshold)n Operates “STAND ALONE” (without µP) if desiredn Available in 20-pin small-outline or molded chip carrierpackageKey Specificationsn Current settling time: 1 µsn Resolution: 8 bitsn Linearity: 8, 9, or 10 bits (guaranteed over temp.)n Gain Tempco: 0.0002% FS/˚Cn Low power dissipation: 20 mWn Single power supply: 5 to 15 VDCTypical Application00560801BI-FET™and MICRO-DAC™are trademarks of National Semiconductor Corporation.Z80®is a registered trademark of Zilog Corporation.March 2002DAC0830/DAC0832 8-Bit µP Compatible, Double-Buffered D to A Converters© 2002 National Semiconductor Corporation DS005608 www.national.comConnection Diagrams (Top Views)Dual-In-Line andSmall-Outline Packages00560821Molded Chip Carrier Package00560822DAC0830/DAC0832www.national.com 2Absolute Maximum Ratings (Notes 1,2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (VCC)17VDCVoltage at Any Digital Input VCCto GNDVoltage at VREFInput±25VStorage Temperature Range −65˚C to +150˚CPackage Dissipationat TA=25˚C (Note 3) 500 mWDC Voltage Applied toIOUT1or IOUT2(Note 4) −100 mV to VCCESD Susceptability (Note 4) 800VLead Temperature (Soldering, 10 sec.)Dual-In-Line Package (plastic) 260˚CDual-In-Line Package (ceramic) 300˚CSurface Mount PackageVapor Phase (60 sec.) 215˚CInfrared (15 sec.) 220˚COperating ConditionsTemperature Range TMIN≤TA≤TMAXPart numbers with “LCN” suffix 0˚C to +70˚CPart numbers with “LCWM” suffix 0˚C to +70˚CPart numbers with “LCV” suffix 0˚C to +70˚CPart numbers with “LCJ” suffix −40˚C to +85˚CPart numbers with “LJ” suffix −55˚C to +125˚CVoltage at Any Digital Input VCCto GNDElectrical CharacteristicsVREF=10.000 VDCunless otherwise noted. Boldface limits apply over temperature, TMIN≤TA≤TMAX. For all other limitsTA=25˚C.Parameter ConditionsSeeNoteVCC= 4.75 VDCVCC= 15.75 VDCVCC=5VDC±5%VCC=12VDC±5%to 15 VDC±5%LimitUnitsTyp(Note 12)TestedLimit(Note 5)DesignLimit(Note 6)CONVERTER CHARACTERISTICSResolution 8 8 8 bitsLinearity Error Max Zero and full scale adjusted 4, 8−10V≤VREF≤+10VDAC0830LJ & LCJ 0.05 0.05 % FSRDAC0832LJ & LCJ 0.2 0.2 % FSRDAC0830LCN, LCWM &LCV0.05 0.05 % FSRDAC0831LCN 0.1 0.1 % FSRDAC0832LCN, LCWM &LCV0.2 0.2 % FSRDifferential Nonlinearity Zero and full scale adjusted 4, 8Max −10V≤VREF≤+10VDAC0830LJ & LCJ 0.1 0.1 % FSRDAC0832LJ & LCJ 0.4 0.4 % FSRDAC0830LCN, LCWM &LCV0.1 0.1 % FSRDAC0831LCN 0.2 0.2 % FSRDAC0832LCN, LCWM &LCV0.4 0.4 % FSRMonotonicity −10V≤VREFLJ & LCJ 4 88bits≤+10V LCN, LCWM &LCV8 8 bitsGain Error Max Using Internal Rfb7±0.2±1±1 %FS−10V≤VREF≤+10VGain Error Tempco Max Using internal Rfb0.0002 0.0006 %DAC0830/DAC0832www.national.com3Electrical Characteristics (Continued)VREF=10.000 VDCunless otherwise noted. Boldface limits apply over temperature, TMIN≤TA≤TMAX. For all other limitsTA=25˚C.Parameter ConditionsSeeNoteVCC= 4.75 VDCVCC= 15.75 VDCVCC=5VDC±5%VCC=12VDC±5%to 15 VDC±5%LimitUnitsTyp(Note 12)TestedLimit(Note 5)DesignLimit(Note 6)CONVERTER CHARACTERISTICSFS/˚CPower Supply Rejection All digital inputs latched highVCC=14.5V to 15.5V 0.0002 0.0025 %11.5V to 12.5V 0.0006 FSR/V4.5V to 5.5V 0.013 0.015Reference Max 15 20 20 kΩInput Min 15 10 10 kΩOutput FeedthroughErrorVREF=20 Vp-p, f=100 kHzAll data inputs latched low3 mVp-pOutputLeakageCurrent MaxIOUT1All data inputs LJ & LCJ 10 100 100 nAlatched low LCN, LCWM &LCV50 100IOUT2All data inputs LJ & LCJ 100 100 nAlatched high LCN, LCWM &LCV50 100Output IOUT1All


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