www.analog.comwww.analog.comSigma-DeltaNew algorithms and TechniquesBob AdamsAnalog Devices Inc.www.analog.comwww.analog.comOutlinen Intro: SAR vs Sigma-Deltan New conversion architectures driven from practical needs in the integrated circuit industryo From 1-bit to Multi-bito Multi-bit Mismatch Shapingo Split Noise-shaping – noise-shaped segmentationo Continuous-time (CT) DACso Mixed CT/DT (continuous/discrete) ADCs n Power Sigma-Delta (“class-D” amplifiers)o Using dynamic hysteresis to reduce the output transition raten Research worko Multiplying Two 1-bit signals and getting a noise-shaped resulto Single-structure sigma-delta/successive-approximation; a converging time-domain view of sigma-deltao Noise-shaping and Prime Numberswww.analog.comwww.analog.comThe Two Competing Views …Successive-approximation ConverterDigital OutputSampled ValueSAR algorithm is “zeroing in” on the value, cutting the search range by 2 every iteration.Take a sample, convert the sample with as much accuracy as possible.www.analog.comwww.analog.comThe Two Competing Views …ModulatorDigital OutputOversampleat > 3MHz, apply to a “Modulator”, filter the low-resolution output to recover the signalDigital FilterSample at > 3 MHzRe-sample at 48 KHz1 to 6 bits, typicallywww.analog.comwww.analog.comSuccessive-Approximation Converter with DAC Errors+-INPUTSAMPLE-AND-HOLD CAPBUFFER COMPARATORDIGITAL OUTSUCCESSIVEAPPROXIMATION REGISTERDIGITAL-TO-ANALOGCONVERTERVINCODE OUTERRORSTRANSFER FUNCTION WITHDAC LINEARITY ERRORSwww.analog.comwww.analog.comLow-Level Signal Performance of SARConverter vs. Sigma-Delta ConverterMSB ERRORANALOG OUTPUT (SINE WAVE PLUS SQUARE WAVE)DIGITAL SINE-WAVE INPUTAMPLFREQSPECTRUM, CONVERTER WITH DNL ERRORAMPLFREQSPECTRUM, CONVERTER WITH NO DNL ERRORHARMONICSRANDOM NOISERANDOM NOISEwww.analog.comwww.analog.comTypical Structure for Sigma-Delta ADCn ∆Σ makes highly-linear ADCs and DACso ADCs with 22-bit linearity exist!LoopFilterAnalogInput(U)CoarseDigitalOutput(V)Coarse ADCDACwww.analog.comwww.analog.comExample STF and NTF0 0.1 0.2 0.3 0.4 0.5-80-60-40-200dBFrequency relative to fclk5th-order NTFSTFLots of attenuation at low frequencies- f < 0.5/OSR(Here OSR = 32, which is a little low for 1-bit ∆Σ)Moderate gain at high frequencieswww.analog.comwww.analog.com∆Σ in the Time Domain0 50 100-101TimeV is often +1 when input is positiveV is often –1 when input is negativewww.analog.comwww.analog.com∆Σ in the Frequency Domain10-310-210-1-150-100-500Frequency relative to fCLKNBW=9.2E-05 x fsHalf-scale (–6 dBFS) inputLow in-band noise 0.5/OSRwww.analog.comwww.analog.com∆Σ Basic Factsn ∆Σ works by oversampling, coarse quantization and noise-shapingn High SNR is possible, if OSR and modulator order are high enoughn Low-order modulators (i.e.1st-order and 2nd-order) are susceptible to in-band tones and DC-input deadbandsn Single-bit modulators are inherently linear, but multi-bit modulators have much higher performanceo Single-bit modulators typically overload for inputs > –3dBFSn ∆Σ modulators come in many flavors: single-bit/multi-bit, single-loop/multi-loop, lowpass/bandpass and real/quadrature (complex)www.analog.comwww.analog.comAudio Demo SetupAnalog In-54 dBA/DSigma-DeltaDigital OutDigital OutAnalog Out54 dB DigitalGain(9-bit Shift)DACA/DSAR15-bit DNLwww.analog.comwww.analog.comAudio Demo SetupSigma-Deltawww.analog.comwww.analog.comAudio Demo Setup15-bit DNL SARwww.analog.comwww.analog.comDriving Forces for New Sigma-Delta Algorithmsn A/D and D/A converters must live in a Noisy Digital Environment and still give High Performanceo Switch from single-bit to multi-bit quantizationo Switch from discrete-time to mix of continuous-time/discrete-time circuitsn Supply voltages are shrinking (5v -> 3V -> 1.8v -> ….)n Digital circuits shrink MUCH more rapidly than analog circuits as process geometries decreaseo Lots of smart DSP can be applied to fix up sloppy analog circuitso The only think which cannot be fixed is thermal noise!n Consumer gear is getting smallero Surround-sound A/V equipment must deliver 8X100 watts in a small space with no large heat-sinkso “Power-sigma-Delta” can dramatically increase efficiency and reduce heat.www.analog.comwww.analog.comOutlinen Intro: SAR vs Sigma-Deltan New conversion architectures driven from practical needs in the integrated circuit industryo From 1-bit to Multi-bito Multi-bit Mismatch Shapingo Split Noise-shaping – noise-shaped segmentationo CT DACso Mixed CT/DT ADCs n Power Sigma-Delta (“class-D” amplifiers)o Using dynamic hysteresis to reduce the output transition raten Research worko Multiplying Two 1-bit signals and getting a noise-shaped resulto Single-structure sigma-delta/successive-approximation; a converging time-domain view of sigma-deltao Noise-shaping and Prime Numberswww.analog.comwww.analog.com1-Bit, Multi-Bit Waveformsn 1-bit Advantageso Linear – no matchingn 1-bit problemso Large steps (jitter sensitivity)o Tonal quantization noise can cause “idle tones” (quantizercan’t be dithered properly)o High-order loops become unstable with large inputsn Multi-bit advantageso Tone-free quantization noise (can be dithered)o Lower-order loops can often be used (easier stability)o Small steps (low jitter sensitivity, less filtering required)n Multi-bit problemso Matching; DAC element errors cause distortion + noisewww.analog.comwww.analog.comTypical Sigma-Delta DAC with Multi-Bit Continuous-Time Output StageDigitalInterpolatorMulti-Bit DigitalModulatorAnalog OutputDigital InputClock (6 MHz)AnalogFilterThermom DecodeDACn DAC is made from equally-weighted elements (resistors or current-sources)n Analog Mismatch causes some levels to be weighted incorrectly. This causes distortion and noise.41624www.analog.comwww.analog.com“Thermometer Code” (3-bit example)INPUTOUTPUT(after quantization and thermometer encoding)Note; all bits are weighted equallywww.analog.comwww.analog.comOutlinen Intro: SAR vs Sigma-Deltan New conversion architectures driven from practical needs in the integrated circuit industryo From 1-bit to Multi-bito Multi-bit Mismatch Shapingo Split Noise-shaping – noise-shaped segmentationo CT DACso Mixed CT/DT ADCs n Power Sigma-Delta (“class-D” amplifiers)o Using dynamic hysteresis to reduce the output transition raten Research worko Multiplying Two 1-bit signals and getting a noise-shaped resulto Single-structure sigma-delta/successive-approximation; a converging time-domain