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Cal Poly Pomona ETE 204 - COURSE OUTLINE

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CALIFORNIA STATE POLYTECHNIC UNIVERSITY, POMONAETE 204COURSE OUTLINECourse InformationABET Unit Classification (4 Quarter Units)Department: Engineering TechnologyMath:Course Number: ETE 204/204LBasic Science:Course Title: Semiconductor Devices & Circuits/LabEngineering Topics: 4Revision Date: 12/14/04Contains significant design content: YesRevised by: Lyle McCurdyOther:Compliant: Catalog 2004/05Curriculum Designation: RequiredI. Catalog DescriptionII. Prerequisites and CorequisitesIII. Textbook and/or other Required MaterialIV. Course ObjectivesV. Expanded Course DescriptionVI. Class/Laboratory ScheduleVII. Contribution of Course to Professional ComponentVIII. Evaluation of StudentsIX. Relationship of Course to Program OutcomesCALIFORNIA STATE POLYTECHNIC UNIVERSITY, POMONAETE 204COURSE OUTLINECourse Information ABET Unit Classification (4 Quarter Units)Department: Engineering Technology Math:Course Number: ETE 204/204L Basic Science:Course Title: Semiconductor Devices & Circuits/Lab Engineering Topics: 4Revision Date: 12/14/04 Contains significant design content: YesRevised by: Lyle McCurdy Other: Compliant: Catalog 2004/05 Curriculum Designation: RequiredI. Catalog DescriptionETE 204/L Semiconductor Devices and Circuits/Laboratory (3/1)Characteristics and applications of solid-state diodes. Characteristics and biasing of BJT devices in CB, CE, CC amplifier configurations – load lines, input/output impedance and mid-band gain calculations. Characteristics and biasing of JFET devices and amplifiers, including load lines, input/output impedances and mid-band gain calculation.3 lectures/problem-solving and 1 three-hour laboratory. Prerequisite: ETE 103.II. Prerequisites and CorequisitesStudents are expected to have a working knowledge of DC and AC circuits when entering this course.III. Textbook and/or other Required Material TF Bogart, JS Beasley and G Rico, Electronic Devices and Circuits, Prentice Hall, 6th edition. John Keown, OrCAD PSpice and Circuit Analysis, Prentice Hall, Fourth Edition,or equivalent. IV. Course ObjectivesUpon successful completion of this course, each student should be able to:1. Describe ideal and non-ideal (practical) PN and PNP/NPN junction operation including simplified models of voltage and current effects, rectification, and zener mode. 2. Use graphical and analytical techniques to analyze/design bias circuits for BJT and JFET amplifiers using fixed and h-bias with single and dual power supplies as applicable, while considering the effects upon the DC load line,Q point, and AC load line.3. Analyze/design BJT and JFET amplifiers in CB/CG, CE/CS, and CC/CD configurations using appropriate small-signal/hybrid-pi models to determine input/output impedance, mid-band gain, and maximum signal swing as set by the AC load line. 4. Utilize PSpice in lecture and lab to simulate the above-mentioned circuits to evaluate proper circuit performance. 5. Work effectively in team settings in lab to connect, test, compare, and document the theoretical, experimental, and simulation results of representative circuits into formal reports that meet professional writing standards. V. Expanded Course Description1. Introduction to semiconductor theory (1 week)The PN junction; voltage and current characteristics in junctions; forward and reverse impedances. 2. Characteristics of semiconductor diodes (1 week)More about PN and PNP/NPN junctions, current flow; ideal and non-ideal (practical) characteristics; zener mode.3. Biasing BJT devices (2 weeks)fixed and h-bias with single and dual power supplies; DC load lines, Q-point, and AC load lines.4. Characteristics of BJT devices in linear region at mid-band (3 weeks)Small-signal and hybrid-pi models; input/output impedance and gain calculations of CB, CE, and CC amplifier configurations; the AC load line and maximum signal output swing. 5. Characteristics and biasing of JFET devices (3 weeks)Page 1 of 3 ETE 20412/14/04Characteristics and biasing of JFET and MOSFET devices; small-signal model; current flow and gain; fixed, self and h-bias; the DC load line and the Q-point in single-stage CS, CG, and CD amplifier configurations, mid-band input/output impedance and gain calculations; the AC load line. VI. Class/Laboratory ScheduleLecture: Two 75 minute sessions per week. Lab: One 3 hour session per week. VII. Contribution of Course to Professional ComponentLecture: Characteristics of semiconductor devices including diodes, BJTs, and JFETs. Biasing and dc and ac load-lines are presented in each of the three configurations -- CB/CG, CE/CS, and CC/CD, followed by analysisand design of amplifier circuits at midband with emphasis on input/output impedance and gain. Lab: A wide range of measurement techniques are used in lab exercises. Students learn to design/analyze diode and transistor circuits, simulate test results with PSpice, set-up test apparatus, gather data and to prepare technical reports. VIII. Evaluation of StudentsStudent outcomes will typically be evaluated using the following methods: homework assignment submittals, writtenin-class midterm and final examinations, one-on-one discussions during office hours, laboratory experiments and laboratory reports. Student grades will typically be based upon the following: quizzes, homework, midterm exam and final exam.IX. Relationship of Course to Program OutcomesCrseObjProgram Outcomes(a)Use ofmoderntoolsof discipl(b)Use ofmath,science,Engg &Tech(c)Doexperi-ments(d)Dsn ofsys &components(e)Workonteams(f)DoTechprobs(g)EffCom(h)Life-longlearn(i)Prof,ethics,socialresps(j)Prof,soc,globl,diversity(k)Qual,Contimpr,timeliness1X X X2 X X X3X X X4X X X5 X X X X X6 X X XPage 2 of 3 ETE 20412/14/04X. Typical Laboratory Experiments. Here, the students are expected work with single stage BJT and JFET amplifiers in the mid-band frequency range in practical laboratory applications. Circuit simulations using Pspice is required. The following labs are oriented to achieve this purpose:Lab 1. Assemble, test and analyze characteristics of typical solid-state diodes, including zener mode. Pspice simulation and formal laboratory report required. Lab 2. Assemble, test, and analyze a mid-band BJT CB amplifier with fixed two-supply bias; DC load line and Q-point, input/output impedance, gain, and maximum output voltage swing as set by the AC load line. Pspice simulation and formal laboratory report required. Lab 3. Assemble, test, and analyze a mid-band BJT CE amplifier


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