CprE / ComS 583 Reconfigurable ComputingWhat is Reconfigurable Computing?Slide 3OutlineWhat Characterizes RC?Temporal (Microprocessor) SystemsExample: Comparison OperationExample: Sorting an ArrayHardware SpectrumHistory of IC TechnologyHistory of Reconfigurable ComputingMoore’s LawClassifying Reconfigurable SystemsLUT-based Logic ElementRaPiD DataPathCoupling in a Reconfigurable SystemCapacity TrendsThe Density Computing AdvantageIntroduction to the FPGAIntroduction (cont.)FPGA ArchitectureFPGA Architecture (cont.)Example: Xilinx Virtex-IICourse AdministrationCourse ProjectSome Suggested TopicsSuggested Project Topics (cont.)Provisional Course ScheduleSummaryCprE / ComS 583Reconfigurable ComputingProf. Joseph ZambrenoDepartment of Electrical and Computer EngineeringIowa State UniversityLecture #1 – IntroductionAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.2What is Reconfigurable Computing?•configurable (adj.) – written to permit modification by users; able to be modified or arranged differently•computing (n.) – the procedure of calculating; determining something by mathematical or logical methods •Reconfigurable computing – a procedure of calculating that is able to be modified by users•Any examples?August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.3What is Reconfigurable Computing?•In its current usage, the term reconfigurable computing refers to some form of hardware programmability•Hardware that can be customized using some physical control points•Goal: to adapt at the logic level to solve specific problems•Why do we care?•Certain applications aren’t well suited to general-purpose computing model•Exponential growth in available chip resources – what to do with them?•Other advantages (fast time-to-market, performance competitive with custom ASIC, bugs can be fixed in the field)August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.4Outline•What is reconfigurable computing?•Defining characteristics•A brief history•The density computing advantage•Introduction to the FPGA•Course administration and outlineAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.5What Characterizes RC?•Parallelism customized to meet design objectives•Logic specialization to perform a specific function•Hardware-level adaptation of functionality to meet changing problem requirementsx+xiw1x+w2x+w3x+w4yiExample: 4-tap FIR filter [DeHon 2000]August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.6Temporal (Microprocessor) Systems•Generalized – can perform many functions well•Sequential – inherently constrained even with multiple data paths•Fixed logic – data sizes, number of computational units, etc. cannot be changedx4  x3 // x[i-3]x3  x2 // x[i-2]x2  x1 // x[i-1]Ax  Ax + 1x1  [Ax] // x[i]t1  w1 x x1t2  t1 + t2…Axt1x1x2x3x4Ayt2w1w2w3w4ALUt2  w2 x x2t1  t1 + t2t2  w3 x x3t1  t1 + t2t2  w4 x x4t1  t1 + t2Ay  Ay + 1[Ay]  t1August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.7Example: Comparison Operation•Specialization? Check.•Optimization? Check.•Parallelism??M1: process(CLK, A, B)begin if rising_edge(CLK) then if (A > B) then H <= A; L <= B; else H <= B; L <= A; end if; end if;end process;01ABCLKH10L<August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.8Example: Sorting an ArrayA BH LA BH LA BH LA BH L0 1 2 3 4 5 6 7in[8]A BH LA BH LA BH LA BH LA BH LA BH LA BH LA BH L0 1 2 3 4 5 6 7out[8]A BH LA BH LA BH LAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.9Hardware Spectrum•ASIC gives high performance at cost of programmability•Processor is very programmable but not tuned to the application•Reconfigurable hardware is a nice compromiseFull CustomASICGate ArrayFPGAPLDGP ProcessorSP ProcessorMultifunctionFixed FunctionCost / PerformanceAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.10History of IC Technology•1947: First transistor (Shockley, Bell Labs)•1958: First integrated circuit (Kilby, TI)•1971: First microprocessor (4004, Intel)•Today: six+ wire layers, 45nm feature sizesAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.11History of Reconfigurable Computing•Earliest reconfigurable computer proposed in the 1960s (Gerald Estrin, UCLA) [1]•Basic concepts well ahead of the enabling technology:•Could only prototype a crude approximation•The availability of high-density VLSI devices that use programmable switches spurred current interest•Current chips – contain memory cells that hold both configuration and state information•Only a partial architecture exists before programming•After configuration, the device provides an execution environment for a specific application[1] G. Estrin et al., “Parallel Processing in a Restructurable Computer System,” IEEE Trans. Electronic Computers, pp. 747-755, Dec. 1963.August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.12Moore’s Law•Exponential rate of increase in the number of transistors per chip - Gordon Moore, Intel [1965]August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.13Classifying Reconfigurable Systems•Current reconfigurable computing systems can be classified by three main design decisions [2]:•Granularity of programmable hardware•Low-level components with traditional ASIC design flow?•More complex base units like multipliers, ALUs, etc.?•Proximity of the CPU to the programmable hardware•On the chip? On the bus? On the board? On the network?•Capacity•How many equivalent ASIC gates?•How to allocate resources? Set ratios of memory to computation to interconnect?[2] W. Mangione-Smith et al., “Seeking Solutions in Configurable Computing,” IEEE Computer, pp. 38-43, Dec. 1997.August 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.14LUT-based Logic Elementcarrylogic4-LUTDFFI1 I2 I3 I4CoutCoutOUT•Each LUT operates on four one-bit inputs•Output is one data bit•Can perform any Boolean function of four inputs•224 = 65536 functions (4096 patterns)•The basic logic element can be more complex (multiplier, ALU, etc.)•Contains some sort of programmable interconnectAugust 22, 2006 CprE 583 – Reconfigurable Computing Lect-01.15RaPiD DataPath•RaPiD: Reconfigurable Pipelined Datapath•Linear array of function units•Function type determined by application•Function units are connected together as needed using segmented buses•Data enters