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University of Texas at Austin CS310H - Computer Organization Spring 2010 Don FussellState MachinesUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 2Another look at D latch/flip-flop1100qold11001100qnewDqnew = DThis is an example of a state diagrammore specifically a Moore machineUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 3Synchronous state machinesIf a system can both process and store information, then thevalues stored in the memory elements depend on both theinputs and the previous values in these elements. This iscalled a sequential system.Such a system is also calleda finite-state machine (FSM).If all changes to memoryvalues happen at the sametime as determined by aglobal system clock, wehave a synchronous FSM.University of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 4FSM definitionAn FSM has the following components:• A set of states• A set of inputs• A set of outputs• A state-transition function (of the states and inputs)• An output function (of the states and maybe inputs)• Moore machine - function of states only• Mealy machine - function of states and inputsThis can be represented by a state diagram• States are circles• Arcs show the state transition function• Arcs are labeled with input values• Outputs are labels on states (Moore) or arcs (Mealy)University of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 5Another example - 2-bit counterCounter starts at 0 (green) and incrementseach time the clock cycles, until it gets to3 and then overflows back to 0.Only input is the clock, we don’t showthat.0101Lnew1100Hold01101100HnewLoldUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 62-bit counter0101Lnew1100Hold01101100HnewLoldHnew = Hold’Lold + HoldLold’Lnew = Hold’Lold’ + HoldLold’ = Lold’University of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 72-bit counter with reset00xx10000R0101Lnew1100Hold01101100HnewLoldLnew = R’Hold’Lold’ + R’HoldLold’ = R’Lold’ = (R + Lold)’Hnew = R’Hold’Lold + R’HoldLold’ = R’(Hold’Lold + HoldLold’)University of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 82-bit counter with resetUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 9Counter with 7-segment displayEach segment in the display can be lit independentlyto allow all 10 decimal digits to be displayed (also hex)2-bit counter will need to display digits 0-3,so will output a 1 for each segment to be litfor a given stateUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 10Counter with output functions01101A01111B01011C01101D00101E00001F01100G00xx10000R0101Ln1100Ho01101100HnLoA = D = R’Ho’Lo’+R’HoLo’+R’HoLo = R’(Ho’Lo)’B = R’ C = R’(HoLo’)’ E = R’Lo’F = R’Ho’Lo’ = (R+Ho+Lo)’ G = R’HoUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 117-segment output logicUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 12Example - 101 lockCombination lock with 101being the combination01001000X101111101110101000010000B0000Ln1100Ho01001100HnLoB is input signal to the lock,X is output signal to unlockUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 13101 combination lockHn = B’Ho’Lo + BHoLo’Ln = BHo’Lo + BHoLo’ + BHoLo = BHo’Lo + BHoLo + BHoLo’ + BHoLo = BLo + BHoX = HoLoUniversity of Texas at Austin CS310H - Computer Organization Spring 2010 Don Fussell 14LC-3


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