Convergence Analysis (5 pages)

Previewing pages 1, 2 of 5 page document View the full content.
View Full Document

Convergence Analysis



Previewing pages 1, 2 of actual document.

View the full content.
View Full Document
View Full Document

33 views

Unformatted text preview:

Convergence Analysis of a New Class of Flexible Hybrid Concatenated Codes Bin Zhao and Matthew C Valenti Lane Dept of Comp Sci Elect Eng West Virginia University Morgantown WV 26506 6109 email bzhao csee wvu edu mvalenti wvu edu Abstract This paper focuses on a new class of flexible hybrid concatenated codes which are able to achieve any desired bit error rate performance between that of a parallel and serial concatenated convolutional code The main contribution of this paper is a convergence analysis of the decoder which is facilitated by an alternative representation of the code structure and an extrinsic information EXIT chart In addition to giving some insight into the behavior and design of this particular type of hybrid code this paper also provides new insight into the relationship between parallel and serial concatenated codes as well as the hybrid concatenated code proposed by Divsalar and Pollara Keywords Turbo codes hybrid codes serial concatenated codes parallel concatenated codes EXIT chart iterative decoding convergence analysis I Introduction In 1 2 a new class of hybrid concatenated codes were proposed and shown to split the bit error performance of parallel concatenated convolutional codes PCCCs and serial concatenated convolutional codes SCCCs in both the waterfall and error floor regions The hybrid code was generated by puncturing the output of a slightly modified parent SCCC encoder comprised of a pair of recursive systematic convolutional RSC encoders The main modification to the SCCC encoder involved an interleaver design which essentially interleaves the systematic and parity bits of the outer code independently This constraint on the interleaver ensures that the output of the inner encoder can be split into four distinct fields the global systematic bits systematic outer systematic inner So Si the single parity due to only the outer encoder parity outer systematic inner Po Si the single parity due to only the inner encoder systematic outer parity inner So Pi and the double parity bits parity outer parity inner Po Pi It is the presence of the double parity bits that di erentiates this SCCC from a PCCC In particular puncturing all the double parity bits generates a PCCC code while keeping all of them maintains a SCCC code Puncturing a fraction of the double parity bits creates a hybrid code whose performance is between that of a PCCC and SCCC code When half of the bits in both Po Pi and So Pi fields are deleted the code operates as a punctured rate 1 3 SCCC but as more Po Pi bits are punctured and more This work was supported by the O ce of Naval Research under grant N00014 00 0655 c 0 7803 7339 1 02 17 00 2002 IEEE So Pi bits maintained the code behaves more like a PCCC More specifically as more double parity bits are punctured the waterfall or turbo cli occurs at a lower SNR while the error floor is raised When all the double parity bits are punctured and all single parity bits maintained the code performance is identical to that of an unpunctured rate 1 3 PCCC The benefit of this approach is that it gives codes with error performance between the two extremes of PCCC and SCCC codes Since the hybrid code is created by simply puncturing the output of a SCCC encoder no additional hardware is required to implement it In fact because a PCCC code can be generated by appropriately puncturing a standard SCCC code with appropriate interleaver it might be wise for IC designers and manufacturers to focus on SCCC products rather than on PCCCs However it should be noted that although a SCCC decoder can be used to decode a PCCC code the complexity of the SCCC decoder is 1 5 times that of the PCCC decoder since the inner code is clocked at twice the rate of the outer code Furthermore the proposed code structure lends itself to application in hybrid FEC ARQ sytemes 1 A hybrid concatenated coding scheme was previously proposed in 3 This technique termed hybrid concatenated convolutional codes HCCCs involves a convolutional code concatenated in parallel with a SCCC A union bounding analysis showed that HCCCs perform better than both SCCCs and PCCCs in both the waterfall region and error floor While our proposed code does not simultaneously perform better than both PCCCs and SCCCs its complexity is much lower In fact we show later that the proposed code is a subclass of the HCCC of 3 II A Class of Flexible Hybrid Codes The proposed hybrid encoder is shown in Fig 1 and is composed of two major parts a rate 1 4 parent SCCC and a puncturing unit The parent SCCC has identical inner and outer encoders separated by a structured interleaver Both constituent codes are recursive systematic convolutional RSC codes with the same generator 35 23 The structured interleaver is designed such that it will map the systematic bits into the first half of the interleaved frame and parity bits into the second half This is equivalent to interleaving the systematic and parity bits independently and then putting them in cascade so that all the interleaved systematic bits are introduced to the input of the inner structured interleaver input Outer code INT S INT P Inner code 100 Hybrid Code A 75 output Puncture 10 2 Fig 1 Proposed hybrid concatenated encoder BER encoder before any of the interleaved parity bits Since the systematic and parity bits are interleaved separately there are actually two sub interleaving units INT S and INT P within this structured interleaver each of which is implemented as an S random interleaver Because of the interleaver design the output codeword can be divided into the four fields shown in Fig 7 The global systematic output So Si is comprised of the systematic bits at the output of the inner encoder that correspond to the interleaved systematic output of the outer encoder i e the first half of the inner encoder s systematic output There are two single parity fields So Pi and Po Si The So Pi field is composed of the parity bits at the output of the inner encoder that are created using the interleaved systematic output of the outer encoder i e the first half of the inner encoder s parity output while the Po Si field is composed of the systematic bits at the output of the inner encoder due to the interleaved parity output of the outer encoder i e the second half of the inner encoder s systematic output The double parity field Po Pi is the parity output of the inner encoder which is generated using the interleaved parity output of the outer encoder i e the second half of


Access the best Study Guides, Lecture Notes and Practice Exams

Loading Unlocking...
Login

Join to view Convergence Analysis and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Convergence Analysis and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?